19 #include "netx_drv_user_conf.h" 20 #ifdef DRV_XPIC_MODULE_ENABLED 35 #ifdef DRV_DEVICE_NETX_90_MPW 36 #error "The MPW chip is no longer supported!" 38 #ifdef DRV_DEVICE_NETX_90 39 #include "regdef/netx90_app/regdef_netx90_arm_app.h" 41 #error "No chip Selected!" 51 #define DRV_XPIC_SEGDEF_HEADER_MAGIC 0x43495058 52 #define DRV_XPIC_SEGDEF_HEADER_MSK_VERSION_MAJOR 0xffff0000 53 #define DRV_XPIC_SEGDEF_HEADER_MSK_VERSION_MINOR 0x0000ffff 54 #define DRV_XPIC_SEGDEF_HEADER_VERSION_MAJOR 0x00010000 55 #define DRV_XPIC_SEGDEF_HEADER_VERSION_MINOR 0x00000000 61 static NX90_XPIC_AREA_T*
const s_aptXpic[] = { (NX90_XPIC_AREA_T*) Addr_NX90_xpic_app_regs };
62 static NX90_XPIC_DEBUG_AREA_T*
const s_aptXpicDebug[] = { (NX90_XPIC_DEBUG_AREA_T*) Addr_NX90_xpic_app_debug };
63 static uint32_t*
const s_apulXpicDram[] = { (uint32_t*) Addr_NX90_xpic_app_dram };
64 static uint32_t*
const s_apulXpicPram[] = { (uint32_t*) Addr_NX90_xpic_app_pram };
67 #define _HW_CONCAT(a,b) a ## b 68 #define HW_MSK(bf) _HW_CONCAT(MSK_NX90_, bf) 69 #define HW_SRT(bf) _HW_CONCAT(SRT_NX90_, bf) 70 #define HW_DFLT_BF_VAL(bf) _HW_CONCAT(DFLT_BF_VAL_NX90_, bf) 71 #define HW_DFLT_VAL(reg) _HW_CONCAT(DFLT_VAL_NX90_, reg) 72 #define HW_REGADR(reg) _HW_CONCAT(Adr_NX90_, reg) 73 #define HW_AREAADR(area) _HW_CONCAT(Addr_NX90_, area) 74 #define HW_TYPE(area) _HW_CONCAT(NX90_, area) 95 const uint32_t *pulCur = &pulData[2];
112 pulDest = (uint32_t*) *pulCur++;
119 *pulDest++ = *pulCur++;
122 pulDest = (uint32_t*) *pulCur++;
140 void DRV_XPIC_Load(
unsigned int uiXpicNo,
const uint32_t *xpic_code,
void* pvUser)
142 unsigned int programm_size;
143 unsigned int tl_size;
144 unsigned int programm_start_adr;
146 unsigned int tl_start;
149 if((xpic_code[0] == 0) && (xpic_code[1] == 0))
157 programm_size = xpic_code[0] / 4;
158 tl_size = xpic_code[1] / 4;
159 programm_start_adr = xpic_code[2];
160 tl_start = programm_size + 2;
163 for(i = 1; i < programm_size; i++)
165 pulData = (uint32_t*) (programm_start_adr + (i - 1) * 4);
166 *pulData = xpic_code[i + 2];
170 for(i = 0; i < tl_size; i = i + 2)
172 pulData = (uint32_t*) (xpic_code[tl_start + i]);
173 *pulData = xpic_code[tl_start + i + 1];
225 s_aptXpicDebug[uiXpicNo]->ulXpic_hold_pc = MSK_NX90_xpic_hold_pc_hold;
237 }
while((ulVal &
HW_MSK(xpic_break_status_xpic_reset_status)) == 0);
243 for(ulVal = 0; ulVal < 5; ulVal++)
245 s_aptXpic[uiXpicNo]->aulXpic_usr[ulVal] = 0;
249 for(ulVal = 0; ulVal < 8; ulVal++)
251 s_aptXpic[uiXpicNo]->aulXpic_r[ulVal] = 0;
258 for(ulVal = 0; ulVal < 8; ulVal++)
260 s_aptXpic[uiXpicNo]->aulXpic_r[ulVal] = 0;
416 void DRV_XPIC_StartEx(
unsigned int uiXpicNo,
bool fSingleStep,
bool fMonitorMode,
bool fIntDis,
bool fMisalignHold,
void* pvUser)
421 ulVal |=
HW_MSK(xpic_hold_pc_single_step);
424 ulVal |=
HW_MSK(xpic_hold_pc_monitor_mode);
427 ulVal |=
HW_MSK(xpic_hold_pc_disable_int);
430 ulVal |=
HW_MSK(xpic_hold_pc_misalignment_hold);
449 uint32_t ulValue = 0;
453 ulValue |=
HW_MSK(xpic_hold_pc_bank_control);
457 ulValue |=
HW_MSK(xpic_hold_pc_bank_select);
475 return s_aptXpic[uiXpicNo]->aulXpic_r[eReg];
490 s_aptXpic[uiXpicNo]->aulXpic_r[eReg] = ulValue;
static uint32_t *const s_apulXpicDram[]
void DRV_XPIC_DisableBreakIrq(unsigned int uiXpicNo, uint32_t ulIrq, bool fOwn)
void DRV_XPIC_Start(unsigned int uiXpicNo, void *pvUser)
void DRV_XPIC_SetBankSelect(unsigned int uiXpicNo, bool fSel, bool fFiqBank)
uint32_t DRV_XPIC_GetLastPc(unsigned int uiXpicNo)
void DRV_XPIC_StartEx(unsigned int uiXpicNo, bool fSinglestep, bool fMonitor, bool fIntDis, bool fMisalignHold, void *pvUser)
void DRV_XPIC_Load(unsigned int uiXpicNo, const uint32_t *pulXpicPrg, void *pvUser)
uint32_t DRV_XPIC_GetReg(unsigned int uiXpicNo, DRV_XPIC_REG_E eReg)
void DRV_XPIC_WrPramDw(unsigned int uiXpicNo, unsigned int uiOffset, uint32_t ulValue)
void DRV_XPIC_Stop(unsigned int uiXpicNo, void *pvUser)
#define DRV_XPIC_SEGDEF_HEADER_MAGIC
void DRV_XPIC_Reset(unsigned int uiXpicNo, void *pvUser)
void DRV_XPIC_EnableBreakIrq(unsigned int uiXpicNo, uint32_t ulIrq, bool fOwn)
uint32_t DRV_XPIC_GetIrqReturnPc(unsigned int uiXpicNo)
static NX90_XPIC_AREA_T *const s_aptXpic[]
void DRV_XPIC_SetReg(unsigned int uiXpicNo, DRV_XPIC_REG_E eReg, uint32_t ulValue)
static NX90_XPIC_DEBUG_AREA_T *const s_aptXpicDebug[]
uint32_t DRV_XPIC_RdPramDw(unsigned int uiXpicNo, unsigned int uiOffset)
void DRV_XPIC_WrDramDw(unsigned int uiXpicNo, unsigned int uiOffset, uint32_t ulValue)
static uint32_t *const s_apulXpicPram[]
void DRV_XPIC_ConfirmBreakIrq(unsigned int uiXpicNo, uint32_t ulIrq)
peripheral module driver.
void DRV_XPIC_SetupWatchPoint(unsigned int uiXpicNo, unsigned int uWpNo, DRV_XPIC_WATCHPOINT_T *ptWp)
uint32_t DRV_XPIC_RdDramDw(unsigned int uiXpicNo, unsigned int uiOffset)
#define DRV_XPIC_SEGDEF_HEADER_VERSION_MAJOR
uint32_t DRV_XPIC_GetBreakIrqRaw(unsigned int uiXpicNo)
#define DRV_XPIC_SEGDEF_HEADER_MSK_VERSION_MAJOR
uint32_t DRV_XPIC_GetFiqReturnPc(unsigned int uiXpicNo)
uint32_t DRV_XPIC_GetIrqStatus(unsigned int uiXpicNo)
static void DRV_XPIC_LoadSegments(unsigned int uiXpicNo, const uint32_t *pulData)
uint32_t DRV_XPIC_GetBreakIrq(unsigned int uiXpicNo, bool fOwn)
uint32_t DRV_XPIC_GetBreakStatus(unsigned int uiXpicNo)