Hilscher netX microcontroller driver  V0.0.5.0
Documentation of the netX driver package
netx_drv_xpic.c
Go to the documentation of this file.
1 /**************************************************************************/
19 #include "netx_drv_user_conf.h"
20 #ifdef DRV_XPIC_MODULE_ENABLED
21 
31 /*****************************************************************************/
32 /* Includes */
33 /*****************************************************************************/
34 
35 #ifdef DRV_DEVICE_NETX_90_MPW
36 #error "The MPW chip is no longer supported!"
37 #else
38 #ifdef DRV_DEVICE_NETX_90
39 #include "regdef/netx90_app/regdef_netx90_arm_app.h"
40 #else
41 #error "No chip Selected!"
42 #endif
43 #endif
44 #include "netx_drv_xpic.h"
45 #include <string.h> /* definition of NULL */
46 
47 /*****************************************************************************/
48 /* Definitions */
49 /*****************************************************************************/
50 
51 #define DRV_XPIC_SEGDEF_HEADER_MAGIC 0x43495058
52 #define DRV_XPIC_SEGDEF_HEADER_MSK_VERSION_MAJOR 0xffff0000
53 #define DRV_XPIC_SEGDEF_HEADER_MSK_VERSION_MINOR 0x0000ffff
54 #define DRV_XPIC_SEGDEF_HEADER_VERSION_MAJOR 0x00010000
55 #define DRV_XPIC_SEGDEF_HEADER_VERSION_MINOR 0x00000000
56 
57 /*****************************************************************************/
58 /* Variables */
59 /*****************************************************************************/
60 
61 static NX90_XPIC_AREA_T* const s_aptXpic[] = { (NX90_XPIC_AREA_T*) Addr_NX90_xpic_app_regs };
62 static NX90_XPIC_DEBUG_AREA_T* const s_aptXpicDebug[] = { (NX90_XPIC_DEBUG_AREA_T*) Addr_NX90_xpic_app_debug };
63 static uint32_t* const s_apulXpicDram[] = { (uint32_t*) Addr_NX90_xpic_app_dram };
64 static uint32_t* const s_apulXpicPram[] = { (uint32_t*) Addr_NX90_xpic_app_pram };
65 
66 #ifndef _HW_CONCAT
67 #define _HW_CONCAT(a,b) a ## b
68 #define HW_MSK(bf) _HW_CONCAT(MSK_NX90_, bf)
69 #define HW_SRT(bf) _HW_CONCAT(SRT_NX90_, bf)
70 #define HW_DFLT_BF_VAL(bf) _HW_CONCAT(DFLT_BF_VAL_NX90_, bf)
71 #define HW_DFLT_VAL(reg) _HW_CONCAT(DFLT_VAL_NX90_, reg)
72 #define HW_REGADR(reg) _HW_CONCAT(Adr_NX90_, reg)
73 #define HW_AREAADR(area) _HW_CONCAT(Addr_NX90_, area)
74 #define HW_TYPE(area) _HW_CONCAT(NX90_, area)
75 #endif
76 
77 /*****************************************************************************/
78 /* Functions */
79 /*****************************************************************************/
80 
81 /*****************************************************************************/
91 /*****************************************************************************/
92 
93 static void DRV_XPIC_LoadSegments(unsigned int uiXpicNo, const uint32_t *pulData)
94 {
95  const uint32_t *pulCur = &pulData[2];
96  uint32_t* pulDest;
97  uint32_t ulLen;
98 
99  /* check header magic */
100  if(*pulCur++ != DRV_XPIC_SEGDEF_HEADER_MAGIC)
101  {
102  /* invalid header */
103  return;
104  }
105  /* check major version */
107  {
108  /* version not supported */
109  return;
110  }
111 
112  pulDest = (uint32_t*) *pulCur++;
113  ulLen = *pulCur++;
114  while(ulLen)
115  {
116  /* load segment */
117  while(ulLen--)
118  {
119  *pulDest++ = *pulCur++;
120  }
121  /* read next segment */
122  pulDest = (uint32_t*) *pulCur++;
123  ulLen = *pulCur++;
124  }
125 }
126 
127 /*****************************************************************************/
138 /*****************************************************************************/
139 
140 void DRV_XPIC_Load(unsigned int uiXpicNo, const uint32_t *xpic_code, void* pvUser)
141 {
142  unsigned int programm_size;
143  unsigned int tl_size;
144  unsigned int programm_start_adr;
145  unsigned int i;
146  unsigned int tl_start;
147  uint32_t* pulData;
148 
149  if((xpic_code[0] == 0) && (xpic_code[1] == 0))
150  {
151  /* xPIC GNU Toolchain - segment definitions */
152  DRV_XPIC_LoadSegments(uiXpicNo, xpic_code);
153  }
154  else
155  {
156  /* xpicass generated program and trailing loads */
157  programm_size = xpic_code[0] / 4; /* in Bytes / 4 */
158  tl_size = xpic_code[1] / 4;
159  programm_start_adr = xpic_code[2];
160  tl_start = programm_size + 2;
161 
162  /* program loader */
163  for(i = 1; i < programm_size; i++)
164  {
165  pulData = (uint32_t*) (programm_start_adr + (i - 1) * 4);
166  *pulData = xpic_code[i + 2];
167  }
168 
169  /* trailing loader */
170  for(i = 0; i < tl_size; i = i + 2)
171  {
172  pulData = (uint32_t*) (xpic_code[tl_start + i]);
173  *pulData = xpic_code[tl_start + i + 1];
174  }
175  }
176 }
177 
178 /*****************************************************************************/
187 /*****************************************************************************/
188 void DRV_XPIC_Start(unsigned int uiXpicNo, void* pvUser)
189 {
190  s_aptXpicDebug[uiXpicNo]->ulXpic_hold_pc = 0;
191 }
192 
193 /*****************************************************************************/
202 /*****************************************************************************/
203 void DRV_XPIC_Stop(unsigned int uiXpicNo, void* pvUser)
204 {
205  s_aptXpicDebug[uiXpicNo]->ulXpic_hold_pc = HW_MSK(xpic_hold_pc_hold);
206 }
207 
208 /*****************************************************************************/
219 /*****************************************************************************/
220 void DRV_XPIC_Reset(unsigned int uiXpicNo, void* pvUser)
221 {
222  uint32_t ulVal;
223 
224  /* hold xPIC */
225  s_aptXpicDebug[uiXpicNo]->ulXpic_hold_pc = MSK_NX90_xpic_hold_pc_hold;
226 
227  /* clear all hold reasons */
228  s_aptXpicDebug[uiXpicNo]->ulXpic_break_irq_raw = 0x1f;
229 
230  /* hold xPIC and request reset */
231  s_aptXpicDebug[uiXpicNo]->ulXpic_hold_pc = HW_MSK(xpic_hold_pc_hold) | HW_MSK(xpic_hold_pc_reset_xpic);
232 
233  /* wait for reset to be finished */
234  do
235  {
236  ulVal = s_aptXpicDebug[uiXpicNo]->ulXpic_break_status;
237  } while((ulVal & HW_MSK(xpic_break_status_xpic_reset_status)) == 0);
238 
239  /* release reset request, engage bank control, select bank 1 */
240  s_aptXpicDebug[uiXpicNo]->ulXpic_hold_pc = HW_MSK(xpic_hold_pc_hold) | HW_MSK(xpic_hold_pc_bank_control) | HW_MSK(xpic_hold_pc_bank_select);
241 
242  /* reset xPIC user registers */
243  for(ulVal = 0; ulVal < 5; ulVal++)
244  {
245  s_aptXpic[uiXpicNo]->aulXpic_usr[ulVal] = 0;
246  }
247 
248  /* reset xPIC work registers (bank 1) */
249  for(ulVal = 0; ulVal < 8; ulVal++)
250  {
251  s_aptXpic[uiXpicNo]->aulXpic_r[ulVal] = 0;
252  }
253 
254  /* select bank 0 */
255  s_aptXpicDebug[uiXpicNo]->ulXpic_hold_pc = HW_MSK(xpic_hold_pc_hold) | HW_MSK(xpic_hold_pc_bank_control);
256 
257  /* reset xPIC work registers (bank 0) */
258  for(ulVal = 0; ulVal < 8; ulVal++)
259  {
260  s_aptXpic[uiXpicNo]->aulXpic_r[ulVal] = 0;
261  }
262 
263  /* release bank control */
264  s_aptXpicDebug[uiXpicNo]->ulXpic_hold_pc = HW_MSK(xpic_hold_pc_hold);
265 }
266 /*****************************************************************************/
276 /*****************************************************************************/
277 uint32_t DRV_XPIC_GetLastPc(unsigned int uiXpicNo)
278 {
279  return s_aptXpicDebug[uiXpicNo]->ulXpic_break_last_pc;
280 }
281 
282 /*****************************************************************************/
291 /*****************************************************************************/
292 uint32_t DRV_XPIC_GetBreakStatus(unsigned int uiXpicNo)
293 {
294  return s_aptXpicDebug[uiXpicNo]->ulXpic_break_status;
295 }
296 
297 /*****************************************************************************/
306 /*****************************************************************************/
307 uint32_t DRV_XPIC_GetBreakIrqRaw(unsigned int uiXpicNo)
308 {
309  return s_aptXpicDebug[uiXpicNo]->ulXpic_break_irq_raw;
310 }
311 
312 /*****************************************************************************/
320 /*****************************************************************************/
321 void DRV_XPIC_ConfirmBreakIrq(unsigned int uiXpicNo, uint32_t ulIrq)
322 {
323  s_aptXpicDebug[uiXpicNo]->ulXpic_break_irq_raw = ulIrq;
324 }
325 
326 /*****************************************************************************/
335 /*****************************************************************************/
336 uint32_t DRV_XPIC_GetBreakIrq(unsigned int uiXpicNo, bool fOwn)
337 {
338  return (fOwn) ? s_aptXpicDebug[uiXpicNo]->ulXpic_break_own_irq_masked : s_aptXpicDebug[uiXpicNo]->ulXpic_break_irq_masked;
339 }
340 
341 /*****************************************************************************/
349 /*****************************************************************************/
350 void DRV_XPIC_EnableBreakIrq(unsigned int uiXpicNo, uint32_t ulIrq, bool fOwn)
351 {
352  if(fOwn)
353  s_aptXpicDebug[uiXpicNo]->ulXpic_break_own_irq_msk_set = ulIrq;
354  else
355  s_aptXpicDebug[uiXpicNo]->ulXpic_break_irq_msk_set = ulIrq;
356 }
357 
358 /*****************************************************************************/
366 /*****************************************************************************/
367 void DRV_XPIC_DisableBreakIrq(unsigned int uiXpicNo, uint32_t ulIrq, bool fOwn)
368 {
369  if(fOwn)
370  s_aptXpicDebug[uiXpicNo]->ulXpic_break_own_irq_msk_reset = ulIrq;
371  else
372  s_aptXpicDebug[uiXpicNo]->ulXpic_break_irq_msk_reset = ulIrq;
373 }
374 
375 /*****************************************************************************/
384 /*****************************************************************************/
385 void DRV_XPIC_SetupWatchPoint(unsigned int uiXpicNo, unsigned int uWpNo, DRV_XPIC_WATCHPOINT_T* ptWp)
386 {
387  if(ptWp == NULL)
388  {
389  /* disable watchpoint */
390  s_aptXpicDebug[uiXpicNo]->asXpic_break[uWpNo].ulContr = 0;
391  }
392  else
393  {
394  s_aptXpicDebug[uiXpicNo]->asXpic_break[uWpNo].ulAddr = ptWp->ulAddrValue;
395  s_aptXpicDebug[uiXpicNo]->asXpic_break[uWpNo].ulAddr_mask = ptWp->ulAddrDcMsk;
396  s_aptXpicDebug[uiXpicNo]->asXpic_break[uWpNo].ulData = ptWp->ulDataValue;
397  s_aptXpicDebug[uiXpicNo]->asXpic_break[uWpNo].ulData_mask = ptWp->ulDataDcMsk;
398  s_aptXpicDebug[uiXpicNo]->asXpic_break[uWpNo].ulContr = ptWp->ulCtrlValue;
399  s_aptXpicDebug[uiXpicNo]->asXpic_break[uWpNo].ulContr_mask = ptWp->ulCtrlDcMsk;
400  }
401 }
402 
403 /*****************************************************************************/
415 /*****************************************************************************/
416 void DRV_XPIC_StartEx(unsigned int uiXpicNo, bool fSingleStep, bool fMonitorMode, bool fIntDis, bool fMisalignHold, void* pvUser)
417 {
418  uint32_t ulVal = 0;
419 
420  if(fSingleStep)
421  ulVal |= HW_MSK(xpic_hold_pc_single_step);
422 
423  if(fMonitorMode)
424  ulVal |= HW_MSK(xpic_hold_pc_monitor_mode);
425 
426  if(fIntDis)
427  ulVal |= HW_MSK(xpic_hold_pc_disable_int);
428 
429  if(fMisalignHold)
430  ulVal |= HW_MSK(xpic_hold_pc_misalignment_hold);
431 
432  s_aptXpicDebug[uiXpicNo]->ulXpic_hold_pc = ulVal;
433 }
434 
435 /*****************************************************************************/
446 /*****************************************************************************/
447 void DRV_XPIC_SetBankSelect(unsigned int uiXpicNo, bool fSel, bool fFiqBank)
448 {
449  uint32_t ulValue = 0;
450 
451  if(fSel)
452  {
453  ulValue |= HW_MSK(xpic_hold_pc_bank_control);
454 
455  if(fFiqBank)
456  {
457  ulValue |= HW_MSK(xpic_hold_pc_bank_select);
458  }
459  }
460 
461  s_aptXpicDebug[uiXpicNo]->ulXpic_hold_pc = ulValue;
462 }
463 
464 /*****************************************************************************/
472 /*****************************************************************************/
473 uint32_t DRV_XPIC_GetReg(unsigned int uiXpicNo, DRV_XPIC_REG_E eReg)
474 {
475  return s_aptXpic[uiXpicNo]->aulXpic_r[eReg];
476 }
477 
478 /*****************************************************************************/
487 /*****************************************************************************/
488 void DRV_XPIC_SetReg(unsigned int uiXpicNo, DRV_XPIC_REG_E eReg, uint32_t ulValue)
489 {
490  s_aptXpic[uiXpicNo]->aulXpic_r[eReg] = ulValue;
491 }
492 
493 /*****************************************************************************/
499 /*****************************************************************************/
500 uint32_t DRV_XPIC_GetIrqStatus(unsigned int uiXpicNo)
501 {
502  return s_aptXpicDebug[uiXpicNo]->ulXpic_irq_status;
503 }
504 
505 /*****************************************************************************/
511 /*****************************************************************************/
512 uint32_t DRV_XPIC_GetIrqReturnPc(unsigned int uiXpicNo)
513 {
514  return s_aptXpicDebug[uiXpicNo]->ulXpic_break_return_irq_pc;
515 }
516 
517 /*****************************************************************************/
523 /*****************************************************************************/
524 uint32_t DRV_XPIC_GetFiqReturnPc(unsigned int uiXpicNo)
525 {
526  return s_aptXpicDebug[uiXpicNo]->ulXpic_break_return_fiq_pc;
527 }
528 
529 /*****************************************************************************/
538 /*****************************************************************************/
539 void DRV_XPIC_WrDramDw(unsigned int uiXpicNo, unsigned int uiOffset, uint32_t ulValue)
540 {
541  s_apulXpicDram[uiXpicNo][uiOffset] = ulValue;
542 }
543 
544 /*****************************************************************************/
554 /*****************************************************************************/
555 uint32_t DRV_XPIC_RdDramDw(unsigned int uiXpicNo, unsigned int uiOffset)
556 {
557  return s_apulXpicDram[uiXpicNo][uiOffset];
558 }
559 
560 /*****************************************************************************/
569 /*****************************************************************************/
570 void DRV_XPIC_WrPramDw(unsigned int uiXpicNo, unsigned int uiOffset, uint32_t ulValue)
571 {
572  s_apulXpicPram[uiXpicNo][uiOffset] = ulValue;
573 }
574 
575 /*****************************************************************************/
585 /*****************************************************************************/
586 uint32_t DRV_XPIC_RdPramDw(unsigned int uiXpicNo, unsigned int uiOffset)
587 {
588  return s_apulXpicPram[uiXpicNo][uiOffset];
589 }
590 /* End of group XPIC */
592 
593 #endif /* DRV_XPIC_MODULE_DISABLED */
594 
static uint32_t *const s_apulXpicDram[]
Definition: netx_drv_xpic.c:63
void DRV_XPIC_DisableBreakIrq(unsigned int uiXpicNo, uint32_t ulIrq, bool fOwn)
void DRV_XPIC_Start(unsigned int uiXpicNo, void *pvUser)
void DRV_XPIC_SetBankSelect(unsigned int uiXpicNo, bool fSel, bool fFiqBank)
uint32_t DRV_XPIC_GetLastPc(unsigned int uiXpicNo)
void DRV_XPIC_StartEx(unsigned int uiXpicNo, bool fSinglestep, bool fMonitor, bool fIntDis, bool fMisalignHold, void *pvUser)
void DRV_XPIC_Load(unsigned int uiXpicNo, const uint32_t *pulXpicPrg, void *pvUser)
DRV_XPIC_REG_E
Definition: netx_drv_xpic.h:56
uint32_t DRV_XPIC_GetReg(unsigned int uiXpicNo, DRV_XPIC_REG_E eReg)
void DRV_XPIC_WrPramDw(unsigned int uiXpicNo, unsigned int uiOffset, uint32_t ulValue)
#define HW_MSK(bf)
Definition: netx_drv_xpic.c:68
void DRV_XPIC_Stop(unsigned int uiXpicNo, void *pvUser)
#define DRV_XPIC_SEGDEF_HEADER_MAGIC
Definition: netx_drv_xpic.c:51
void DRV_XPIC_Reset(unsigned int uiXpicNo, void *pvUser)
void DRV_XPIC_EnableBreakIrq(unsigned int uiXpicNo, uint32_t ulIrq, bool fOwn)
uint32_t DRV_XPIC_GetIrqReturnPc(unsigned int uiXpicNo)
static NX90_XPIC_AREA_T *const s_aptXpic[]
Definition: netx_drv_xpic.c:61
void DRV_XPIC_SetReg(unsigned int uiXpicNo, DRV_XPIC_REG_E eReg, uint32_t ulValue)
static NX90_XPIC_DEBUG_AREA_T *const s_aptXpicDebug[]
Definition: netx_drv_xpic.c:62
uint32_t DRV_XPIC_RdPramDw(unsigned int uiXpicNo, unsigned int uiOffset)
void DRV_XPIC_WrDramDw(unsigned int uiXpicNo, unsigned int uiOffset, uint32_t ulValue)
static uint32_t *const s_apulXpicPram[]
Definition: netx_drv_xpic.c:64
void DRV_XPIC_ConfirmBreakIrq(unsigned int uiXpicNo, uint32_t ulIrq)
peripheral module driver.
void DRV_XPIC_SetupWatchPoint(unsigned int uiXpicNo, unsigned int uWpNo, DRV_XPIC_WATCHPOINT_T *ptWp)
uint32_t DRV_XPIC_RdDramDw(unsigned int uiXpicNo, unsigned int uiOffset)
#define DRV_XPIC_SEGDEF_HEADER_VERSION_MAJOR
Definition: netx_drv_xpic.c:54
uint32_t DRV_XPIC_GetBreakIrqRaw(unsigned int uiXpicNo)
#define DRV_XPIC_SEGDEF_HEADER_MSK_VERSION_MAJOR
Definition: netx_drv_xpic.c:52
uint32_t DRV_XPIC_GetFiqReturnPc(unsigned int uiXpicNo)
uint32_t DRV_XPIC_GetIrqStatus(unsigned int uiXpicNo)
static void DRV_XPIC_LoadSegments(unsigned int uiXpicNo, const uint32_t *pulData)
Definition: netx_drv_xpic.c:93
uint32_t DRV_XPIC_GetBreakIrq(unsigned int uiXpicNo, bool fOwn)
uint32_t DRV_XPIC_GetBreakStatus(unsigned int uiXpicNo)