Hilscher netX microcontroller driver  V0.0.5.0
Documentation of the netX driver package
netx_drv_tim.c
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1 /*!************************************************************************/
24 /* Includes ------------------------------------------------------------------*/
25 #include "netx_drv.h"
26 #ifdef DRV_TIM_MODULE_ENABLED
27 
32 /*lint -save -e685 */
33 /*lint -save -e568 */
34 
39 enum
40 {
49 };
50 
57 
64 
69 
74 
78 static volatile uint32_t s_apTIMIrqCntr[DRV_TIM_IRQ_COUNT] = { 0 };
79 
80 #ifndef DRV_HANDLE_CHECK_INACTIVE
81 
84 #define DRV_HANDLE_CHECK(handle)\
85  if((handle) == 0){ \
86  return DRV_ERROR_PARAM; \
87  } \
88  if((handle)->ptDevice.ptGpio == 0 || \
89  (handle)->tConfiguration.eDeviceID < DRV_TIM_DEVICE_ID_GPIOCNTR_MIN || \
90  (handle)->tConfiguration.eDeviceID > DRV_TIM_DEVICE_ID_SYSTIME_MAX){ \
91  return DRV_ERROR_PARAM; \
92  }
93 #else
94 
97 #define DRV_HANDLE_CHECK(handle)
98 #endif
99 
108 {
109  /* Check the TIM handle allocation */
110  if(ptTim == NULL)
111  {
112  return DRV_ERROR_PARAM;
113  }
114  ptTim->tLock = DRV_LOCK_INITIALIZER;
115  DRV_LOCK(ptTim);
116  DRV_STATUS_E ret = DRV_ERROR;
117  uint32_t id;
119  {
120  ret = DRV_NSUPP;
121  }
123  {
124  ret = DRV_ERROR_PARAM;
125  }
127  {
129  {
131  }
135  {
136  return DRV_ERROR_PARAM;
137  }
139  {
140  return DRV_ERROR_PARAM;
141  }
143  ptTim->ulSubID = (uint32_t) ptTim->tConfiguration.eDeviceID - (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MIN;
148  {
149  ptTim->ptDevice.ptGpio->gpio_app_counter_ctrl_b[ptTim->ulSubID].once = 0x01u;
150  }
151  else
152  {
153  ptTim->ptDevice.ptGpio->gpio_app_counter_ctrl_b[ptTim->ulSubID].once = 0x00u;
154  }
155  ptTim->ptDevice.ptGpio->gpio_app_counter_ctrl_b[ptTim->ulSubID].run = 0x00u;
157  ptTim->ptDevice.ptGpio->gpio_app_counter_ctrl_b[ptTim->ulSubID].sym_nasym = ptTim->tConfiguration.eSymmetric;
158  ptTim->ptDevice.ptGpio->gpio_app_counter_cnt[ptTim->ulSubID] = 0x00ul;
160  {
161  NVIC_DisableIRQ((IRQn_Type) (((IRQn_Type[] ) { DRV_GPIO_COUNTER_IRQs } )[0] + ptTim->ulSubID));
163  ptTim->ptDevice.ptGpio->gpio_app_counter_ctrl_b[ptTim->ulSubID].irq_en = 1u;
164  ptTim->ptDevice.ptGpio->gpio_app_cnt_irq_raw = 0x01ul << ptTim->ulSubID;
165  }
166  else
167  {
168  ptTim->ptDevice.ptGpio->gpio_app_counter_ctrl_b[ptTim->ulSubID].irq_en = 0u;
169  }
170  for(id = 0; id <= DRV_DIO_ID_GPIO_MAX - DRV_DIO_ID_GPIO_MIN; id++)
171  {
172  if(((uint32_t) ptTim->tConfiguration.eDioMskOutputReference & (((uint32_t) DRV_DIO_MSK_GPIO_0 ) << id)) > 0)
173  {
174  ptTim->ptDevice.ptGpio->gpio_app_cfg_b[id].count_ref = ptTim->ulSubID;
175  }
176  }
177  ptTim->eState = DRV_TIM_STATE_STOPPED;
178  ret = DRV_OK;
179  }
181  {
183  {
184  return DRV_ERROR_PARAM;
185  }
187  ptTim->ulSubID = (uint32_t) ptTim->tConfiguration.eDeviceID - (uint32_t) DRV_TIM_DEVICE_ID_TIMER_MIN;
190  {
192  }
193  else
194  {
196  }
198  {
200  }
201  ptTim->ptDevice.ptTimer->timer_config_timer_b[ptTim->ulSubID].systime_config = (uint32_t) ptTim->tConfiguration.eSystimeReference
202  - (uint32_t) DRV_TIM_SYSTIME_REFERENCE_MIN;
203  ptTim->ptDevice.ptTimer->timer_preload_timer[ptTim->ulSubID] = 0ul;
204  ptTim->ptDevice.ptTimer->timer_timer[ptTim->ulSubID] = 0ul;
206  {
207  NVIC_DisableIRQ((IRQn_Type) (((IRQn_Type[] ) { DRV_TIMER_IRQs } )[0] + ptTim->ulSubID));
209  ptTim->ptDevice.ptTimer->timer_irq_raw = 0x01ul << ptTim->ulSubID;
210  }
211  ptTim->eState = DRV_TIM_STATE_STOPPED;
212  ret = DRV_OK;
213  }
215  {
218  {
221  ptTim->ptDevice.ptTimer->timer_irq_raw_b.systime_s_irq = 1;
222  }
223  ptTim->eState = DRV_TIM_STATE_STOPPED;
224  ret = DRV_OK;
225  }
227  {
229  if((ptTim->tConfiguration.tPreloadValue - 1UL) > 0x00FFFFFF)
230  {
231  ret = DRV_ERROR_PARAM;
232  }
233  else
234  {
236  ptTim->ptDevice.ptSysTick->LOAD = (uint32_t) 0x00FFFFFF & (ptTim->tConfiguration.tPreloadValue - 1UL); /* set reload register */
237  ptTim->ptDevice.ptSysTick->VAL = 0UL; /* Load the SysTick Counter Value */
240  {
243  NVIC_SetPriority(SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
244  ptTim->ptDevice.ptSysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;/* Enable SysTick IRQ */
245  }
246  ret = DRV_OK;
247  }
248  }
250  {
253  ret = DRV_OK;
254  }
255  else
256  {
257  ret = DRV_ERROR_PARAM;
258  }
259  DRV_UNLOCK(ptTim);
260  return ret;
261 }
262 
268 {
269  DRV_HANDLE_CHECK(ptTim);
270  DRV_LOCK(ptTim);
271  /* Check the parameters */
272  DRV_STATUS_E ret = DRV_ERROR;
274  {
276  {
280  aulIRQnTable[DRV_TIM_IRQ_GPIOTIM0 + (uint32_t) ptTim->tConfiguration.eDeviceID - (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MIN]);
281  }
282  *ptTim = (DRV_TIM_HANDLE_T ) { 0 };
283  ret = DRV_OK;
284  }
286  {
288  {
291  aulIRQnTable[DRV_TIM_IRQ_TIMER0 + (uint32_t) ptTim->tConfiguration.eDeviceID - (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MIN]);
292  }
293  *ptTim = (DRV_TIM_HANDLE_T ) { 0 };
294  ret = DRV_OK;
295  }
297  {
299  {
301  DRV_NVIC_ClearPendingIRQ(aulIRQnTable[DRV_TIM_IRQ_SYSTIME_COMPARE]);
302  }
303  *ptTim = (DRV_TIM_HANDLE_T ) { 0 };
304  ret = DRV_OK;
305  }
307  {
309  {
311  DRV_NVIC_ClearPendingIRQ(aulIRQnTable[DRV_TIM_IRQ_SYSTICK]);
312  }
313  *ptTim = (DRV_TIM_HANDLE_T ) { 0 };
314  ret = DRV_OK;
315  }
317  {
318  *ptTim = (DRV_TIM_HANDLE_T ) { 0 };
319  ret = DRV_OK;
320  }
321  else
322  {
323  ret = DRV_ERROR_PARAM;
324  }
325 
326  /* Release Lock */
327 
328  return ret;
329 }
330 
339 {
340  DRV_HANDLE_CHECK(ptTim);
341  DRV_LOCK(ptTim);
342  DRV_STATUS_E ret = DRV_ERROR;
344  {
345  if(ptTim->ulSubID > (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MAX - (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MIN)
346  {
347  ret = DRV_ERROR_PARAM;
348  }
350  {
352  ptTim->ptDevice.ptGpio->gpio_app_counter_ctrl_b[ptTim->ulSubID].run = 0x01u;
353  ptTim->eState = DRV_TIM_STATE_RUNNING;
354  ret = DRV_OK;
355  }
357  {
359  ptTim->ptDevice.ptGpio->gpio_app_counter_ctrl_b[ptTim->ulSubID].run = 0x01u;
360  ptTim->ptDevice.ptGpio->gpio_app_cnt_irq_mask_set = 0x01ul << ptTim->ulSubID;
362  ptTim->eState = DRV_TIM_STATE_RUNNING;
363  ret = DRV_OK;
364  }
366  {
367  ret = DRV_NSUPP;
368  }
369  else
370  {
371  ret = DRV_ERROR_PARAM;
372  }
373  }
375  {
376  if(ptTim->ulSubID > (uint32_t) DRV_TIM_DEVICE_ID_TIMER_MAX - (uint32_t) DRV_TIM_DEVICE_ID_TIMER_MIN)
377  {
378  ret = DRV_ERROR_PARAM;
379  }
381  {
384  ptTim->eState = DRV_TIM_STATE_RUNNING;
385  ret = DRV_OK;
386  }
388  {
390  {
392  }
393  else
394  {
396  }
397  ptTim->ptDevice.ptTimer->timer_irq_msk_set = 0x01ul << ptTim->ulSubID;
399  ptTim->eState = DRV_TIM_STATE_RUNNING;
400  ret = DRV_OK;
401  }
403  {
404  ret = DRV_NSUPP;
405  }
406  else
407  {
408  ret = DRV_ERROR_PARAM;
409  }
410  }
412  {
414  {
415  ret = DRV_NSUPP;
416  }
418  {
419  ptTim->ptDevice.ptTimer->timer_irq_msk_set_b.systime_s_irq = 1;
421  ptTim->eState = DRV_TIM_STATE_RUNNING;
422  ret = DRV_OK;
423  }
425  {
426  ret = DRV_NSUPP;
427  }
428  else
429  {
430  ret = DRV_ERROR_PARAM;
431  }
432  }
434  {
436  {
437  ptTim->ptDevice.ptSysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;/* Enable SysTick */
438  ptTim->eState = DRV_TIM_STATE_RUNNING;
439  ret = DRV_OK;
440  }
442  {
444  ptTim->ptDevice.ptSysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;/* Enable SysTick */
445  ptTim->eState = DRV_TIM_STATE_RUNNING;
446  ret = DRV_OK;
447  }
449  {
450  ret = DRV_NSUPP;
451  }
452  else
453  {
454  ret = DRV_ERROR_PARAM;
455  }
456  }
458  {
459  ret = DRV_NSUPP;
460  }
461  else
462  {
463  ret = DRV_ERROR_PARAM;
464  }
465  /* Return function status */
466  DRV_UNLOCK(ptTim);
467  return ret;
468 }
469 
478 {
479  DRV_HANDLE_CHECK(ptTim);
480  DRV_LOCK(ptTim);
481  DRV_STATUS_E ret = DRV_ERROR;
483  {
484  if(ptTim->ulSubID > (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MAX - (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MIN)
485  {
486  ret = DRV_ERROR_PARAM;
487  }
489  {
491  ptTim->ptDevice.ptGpio->gpio_app_counter_cnt[ptTim->ulSubID] = 0;
492  ptTim->ptDevice.ptGpio->gpio_app_counter_ctrl_b[ptTim->ulSubID].run = 0x00u;
493  ptTim->eState = DRV_TIM_STATE_STOPPED;
494  ret = DRV_OK;
495  }
497  {
500  ptTim->ptDevice.ptGpio->gpio_app_counter_ctrl_b[ptTim->ulSubID].run = 0x00u;
501  ptTim->ptDevice.ptGpio->gpio_app_cnt_irq_mask_rst = 0x01ul << ptTim->ulSubID;
502  ptTim->ptDevice.ptGpio->gpio_app_cnt_irq_raw = 0x01ul << ptTim->ulSubID;
503  ptTim->ptDevice.ptGpio->gpio_app_counter_cnt[ptTim->ulSubID] = 0;
504  ptTim->eState = DRV_TIM_STATE_STOPPED;
505  ret = DRV_OK;
506  }
508  {
509  ret = DRV_NSUPP;
510  }
511  else
512  {
513  ret = DRV_ERROR_PARAM;
514  }
515  }
517  {
518  if(ptTim->ulSubID > (uint32_t) DRV_TIM_DEVICE_ID_TIMER_MAX - (uint32_t) DRV_TIM_DEVICE_ID_TIMER_MIN)
519  {
520  ret = DRV_ERROR_PARAM;
521  }
523  {
525  ptTim->ptDevice.ptTimer->timer_timer[ptTim->ulSubID] = 0;
526  ptTim->ptDevice.ptTimer->timer_preload_timer[ptTim->ulSubID] = 0;
527  ptTim->eState = DRV_TIM_STATE_STOPPED;
528  ret = DRV_OK;
529  }
531  {
534  ptTim->ptDevice.ptTimer->timer_irq_msk_reset = 0x01ul << ptTim->ulSubID;
535  ptTim->ptDevice.ptTimer->timer_irq_raw = 0x01ul << ptTim->ulSubID;
536  ptTim->ptDevice.ptTimer->timer_preload_timer[ptTim->ulSubID] = 0;
537  ptTim->ptDevice.ptTimer->timer_timer[ptTim->ulSubID] = 0;
538  ptTim->eState = DRV_TIM_STATE_STOPPED;
539  ret = DRV_OK;
540  }
542  {
543  ret = DRV_NSUPP;
544  }
545  else
546  {
547  ret = DRV_ERROR_PARAM;
548  }
549  }
551  {
553  {
554  ret = DRV_NSUPP;
555  }
557  {
559  ptTim->ptDevice.ptTimer->timer_irq_msk_reset_b.systime_s_irq = 1u;
560  ptTim->ptDevice.ptTimer->timer_irq_raw_b.systime_s_irq = 1u;
561  ptTim->eState = DRV_TIM_STATE_STOPPED;
562  ret = DRV_OK;
563  }
565  {
566  ret = DRV_NSUPP;
567  }
568  else
569  {
570  ret = DRV_ERROR_PARAM;
571  }
572  }
574  {
576  {
578  ptTim->ptDevice.ptSysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;/* Disable SysTick */
579  ptTim->ptDevice.ptSysTick->VAL = 0ul;
580  ptTim->eState = DRV_TIM_STATE_STOPPED;
581  ret = DRV_OK;
582  }
584  {
587  ptTim->ptDevice.ptSysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;/* Disable SysTick */
588  ptTim->ptDevice.ptSysTick->VAL = 0ul;
589  ptTim->eState = DRV_TIM_STATE_STOPPED;
590  ret = DRV_OK;
591  }
593  {
594  ret = DRV_NSUPP;
595  }
596  else
597  {
598  ret = DRV_ERROR_PARAM;
599  }
600  }
602  {
603  ret = DRV_NSUPP;
604  }
605  else
606  {
607  ret = DRV_ERROR_PARAM;
608  }
609  DRV_UNLOCK(ptTim);
610  /* Return function status */
611  return ret;
612 }
613 
620 {
621  DRV_HANDLE_CHECK(ptTim);
622  DRV_LOCK(ptTim);
623  DRV_STATUS_E ret = DRV_ERROR;
625  {
626  if(ptTim->ulSubID > (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MAX - (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MIN)
627  {
628  ret = DRV_ERROR_PARAM;
629  }
631  {
632  ptTim->ptDevice.ptGpio->gpio_app_counter_ctrl_b[ptTim->ulSubID].run = 0x00u;
633  ptTim->eState = DRV_TIM_STATE_PAUSED;
634  ret = DRV_OK;
635  }
637  {
639  ptTim->ptDevice.ptGpio->gpio_app_counter_ctrl_b[ptTim->ulSubID].run = 0x00u;
640  ptTim->ptDevice.ptGpio->gpio_app_cnt_irq_mask_rst = 0x01ul << ptTim->ulSubID;
641  ptTim->eState = DRV_TIM_STATE_PAUSED;
642  ret = DRV_OK;
643  }
645  {
646  ret = DRV_NSUPP;
647  }
648  else
649  {
650  ret = DRV_ERROR_PARAM;
651  }
652  }
654  {
655  if(ptTim->ulSubID > (uint32_t) DRV_TIM_DEVICE_ID_TIMER_MAX - (uint32_t) DRV_TIM_DEVICE_ID_TIMER_MIN)
656  {
657  ret = DRV_ERROR_PARAM;
658  }
660  {
661  ret = DRV_NSUPP;
662  }
664  {
665  ret = DRV_NSUPP;
666  }
668  {
669  ret = DRV_NSUPP;
670  }
671  else
672  {
673  ret = DRV_ERROR_PARAM;
674  }
675  }
677  {
679  {
680  ret = DRV_NSUPP;
681  }
683  {
684  ret = DRV_NSUPP;
685  }
687  {
688  ret = DRV_NSUPP;
689  }
690  else
691  {
692  ret = DRV_ERROR_PARAM;
693  }
694  }
696  {
698  {
699  ptTim->ptDevice.ptSysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;/* Disable SysTick */
700  ptTim->eState = DRV_TIM_STATE_PAUSED;
701  ret = DRV_OK;
702  }
704  {
706  ptTim->ptDevice.ptSysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;/* Disable SysTick */
707  ptTim->eState = DRV_TIM_STATE_PAUSED;
708  ret = DRV_OK;
709  }
711  {
712  ret = DRV_NSUPP;
713  }
714  else
715  {
716  ret = DRV_ERROR_PARAM;
717  }
718  }
720  {
721  ret = DRV_NSUPP;
722  }
723  else
724  {
725  ret = DRV_ERROR_PARAM;
726  }
727  DRV_UNLOCK(ptTim);
728  /* Return function status */
729  return ret;
730 }
731 
747 DRV_STATUS_E DRV_TIM_Wait(DRV_TIM_HANDLE_T * const ptTim, uint32_t ulTickCnt)
748 {
749  DRV_HANDLE_CHECK(ptTim);
750  DRV_LOCK(ptTim);
751  DRV_STATUS_E ret = DRV_ERROR;
752  if(ulTickCnt != 0
754  {
755  DRV_UNLOCK(ptTim);
756  return DRV_ERROR_PARAM;
757  }
758  if(ptTim->eState != DRV_TIM_STATE_RUNNING)
759  {
760  return DRV_ERROR;
761  }
762  if(ulTickCnt == 0)
763  {
764  ret = DRV_OK;
765  }
767  {
768  if(ptTim->ulSubID > (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MAX - (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MIN)
769  {
770  ret = DRV_ERROR_PARAM;
771  }
773  {
774  ptTim->ptDevice.ptGpio->gpio_app_counter_ctrl_b[ptTim->ulSubID].once = 1;
775  for(; ulTickCnt > 0; ulTickCnt--)
776  {
777  ptTim->ptDevice.ptGpio->gpio_app_counter_cnt[ptTim->ulSubID] = 0;
778  while(ptTim->ptDevice.ptTimer->timer_timer[ptTim->ulSubID] != 0)
779  {
780  }
782  {
784  }
785  }
786  ptTim->ptDevice.ptGpio->gpio_app_counter_ctrl_b[ptTim->ulSubID].once =
788  ret = DRV_OK;
789  }
791  {
792  uint32_t latch = s_apTIMIrqCntr[DRV_TIM_IRQ_GPIOTIM0 + ptTim->ulSubID];
793  while(s_apTIMIrqCntr[DRV_TIM_IRQ_GPIOTIM0 + ptTim->ulSubID] - latch <= ulTickCnt)
794  {
795  }
796  ret = DRV_OK;
797  }
799  {
800  ret = DRV_NSUPP;
801  }
802  else
803  {
804  ret = DRV_ERROR_PARAM;
805  }
806  }
808  {
809  if(ptTim->ulSubID > (uint32_t) DRV_TIM_DEVICE_ID_TIMER_MAX - (uint32_t) DRV_TIM_DEVICE_ID_TIMER_MIN)
810  {
811  ret = DRV_ERROR_PARAM;
812  }
814  {
816  for(; ulTickCnt > 0; ulTickCnt--)
817  {
819  while(ptTim->ptDevice.ptTimer->timer_timer[ptTim->ulSubID] != 0)
820  {
821  }
823  {
825  }
826  }
827  ret = DRV_OK;
828  }
830  {
831  uint32_t latch = s_apTIMIrqCntr[DRV_TIM_IRQ_TIMER0 + ptTim->ulSubID];
832  while(s_apTIMIrqCntr[DRV_TIM_IRQ_TIMER0 + ptTim->ulSubID] - latch <= ulTickCnt)
833  {
834  }
835  ret = DRV_OK;
836  }
838  {
839  ret = DRV_NSUPP;
840  }
841  else
842  {
843  ret = DRV_ERROR_PARAM;
844  }
845  }
847  {
849  {
850  while(DRV_TIMER_DEVICE->timer_systime_s < ulTickCnt)
851  {
852  }
853  volatile uint32_t ulDummy;
854  ulDummy = DRV_TIMER_DEVICE->timer_systime_ns;
855  UNUSED(ulDummy);
857  {
859  }
860  ret = DRV_OK;
861  }
863  {
864  ret = DRV_NSUPP;
865  }
866  else
867  {
868  ret = DRV_ERROR_PARAM;
869  }
870  }
872  {
874  {
876  for(; ulTickCnt > 0; ulTickCnt--)
877  {
878  while((ptTim->ptDevice.ptSysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == 0)
879  {
881  {
883  }
884  }
885  }
886  ret = DRV_OK;
887  }
889  {
890  uint32_t latch = s_apTIMIrqCntr[DRV_TIM_IRQ_SYSTICK];
891  while(s_apTIMIrqCntr[DRV_TIM_IRQ_SYSTICK] - latch <= ulTickCnt)
892  {
893  }
894  ret = DRV_OK;
895  }
897  {
898  ret = DRV_NSUPP;
899  }
900  else
901  {
902  ret = DRV_ERROR_PARAM;
903  }
904  }
906  {
907  ret = DRV_NSUPP;
908  }
909  else
910  {
911  ret = DRV_ERROR_PARAM;
912  }
913  DRV_UNLOCK(ptTim);
914  /* Return function status */
915  return ret;
916 }
917 
933 DRV_STATUS_E DRV_TIM_ChannelSetThreshold(DRV_TIM_HANDLE_T * const ptTim, DRV_DIO_ID_T ulChannelID, uint32_t ulTC)
934 {
935  DRV_HANDLE_CHECK(ptTim);
936  DRV_LOCK(ptTim);
937  DRV_STATUS_E ret = DRV_ERROR;
938  if(ulChannelID <= DRV_DIO_ID_GPIO_MAX && ulChannelID >= DRV_DIO_ID_GPIO_MIN)
939  {
941  {
942  ret = DRV_ERROR_PARAM;
943  }
944  else if(((uint32_t) ptTim->tConfiguration.eDioMskOutputReference & (0x01ul << ulChannelID)) > 0)
945  {
946  ptTim->ptDevice.ptGpio->gpio_app_tc[ulChannelID - DRV_DIO_ID_GPIO_MIN] = ulTC;
947  ret = DRV_OK;
948  }
949  else
950  {
951  ret = DRV_ERROR_PARAM;
952  }
953  }
954  else
955  {
956  ret = DRV_ERROR_PARAM;
957  }
958  DRV_UNLOCK(ptTim);
959  return ret;
960 }
961 
973 DRV_STATUS_E DRV_TIM_ChannelGetCapture(DRV_TIM_HANDLE_T * const ptTim, DRV_DIO_ID_T ulChannelID, uint32_t * const ulValue)
974 {
975  DRV_HANDLE_CHECK(ptTim);
976  DRV_LOCK(ptTim);
977  if(ulValue == 0)
978  {
979  DRV_UNLOCK(ptTim);
980  return DRV_ERROR_PARAM;
981  }
982  DRV_STATUS_E ret = DRV_ERROR;
983  if(ulChannelID <= DRV_DIO_ID_GPIO_MAX && ulChannelID >= DRV_DIO_ID_GPIO_MIN)
984  {
986  {
987  ret = DRV_ERROR_PARAM;
988  }
989  else if(((uint32_t) ptTim->tConfiguration.eDioMskOutputReference & (0x01ul << ulChannelID)) > 0)
990  {
991  *ulValue = ptTim->ptDevice.ptGpio->gpio_app_tc[ulChannelID - DRV_DIO_ID_GPIO_MIN];
992  ret = DRV_OK;
993  }
994  else
995  {
996  ret = DRV_ERROR_PARAM;
997  }
998  }
999  else
1000  {
1001  ret = DRV_ERROR_PARAM;
1002  }
1003  DRV_UNLOCK(ptTim);
1004  return ret;
1005 }
1006 
1016 DRV_STATUS_E DRV_TIM_IRQAttach(DRV_TIM_HANDLE_T * const ptTim, DRV_CALLBACK_F pfnUserClb, void* pvUser)
1017 {
1018  DRV_HANDLE_CHECK(ptTim);
1019  DRV_LOCK(ptTim);
1020  DRV_STATUS_E ret = DRV_ERROR;
1021  switch (ptTim->tConfiguration.eDeviceID)
1022  {
1025  s_apTIMCallbackDriverHandleTable[DRV_TIM_IRQ_GPIOTIM0] = ptTim;
1027  ret = DRV_OK;
1028  break;
1031  s_apTIMCallbackDriverHandleTable[DRV_TIM_IRQ_GPIOTIM1] = ptTim;
1033  ret = DRV_OK;
1034  break;
1037  s_apTIMCallbackDriverHandleTable[DRV_TIM_IRQ_GPIOTIM2] = ptTim;
1039  ret = DRV_OK;
1040  break;
1041 
1044  s_apTIMCallbackDriverHandleTable[DRV_TIM_IRQ_TIMER0] = ptTim;
1046  ret = DRV_OK;
1047  break;
1050  s_apTIMCallbackDriverHandleTable[DRV_TIM_IRQ_TIMER1] = ptTim;
1052  ret = DRV_OK;
1053  break;
1056  s_apTIMCallbackDriverHandleTable[DRV_TIM_IRQ_TIMER2] = ptTim;
1058  ret = DRV_OK;
1059  break;
1060 
1063  s_apTIMCallbackDriverHandleTable[DRV_TIM_IRQ_SYSTIME_COMPARE] = ptTim;
1065  ret = DRV_OK;
1066  break;
1067 
1070  s_apTIMCallbackDriverHandleTable[DRV_TIM_IRQ_SYSTICK] = ptTim;
1072  ret = DRV_OK;
1073  break;
1074 
1078  ret = DRV_NSUPP;
1079  break;
1080  }
1081  DRV_UNLOCK(ptTim);
1082  return ret;
1083 }
1084 
1092 {
1093  DRV_HANDLE_CHECK(ptTim);
1094  DRV_STATUS_E ret = DRV_OK;
1095  *peState = ptTim->eState;
1096  if(peState == 0)
1097  {
1098  return DRV_ERROR_PARAM;
1099  }
1100  switch (ptTim->eState)
1101  {
1102  case DRV_TIM_STATE_DEFAULT:
1103  ret = DRV_ERROR_PARAM;
1104  break;
1105  case DRV_TIM_STATE_ERROR:
1106  ret = DRV_ERROR;
1107  break;
1108  case DRV_TIM_STATE_RUNNING:
1109  ret = DRV_BUSY;
1110  break;
1111  case DRV_TIM_STATE_STOPPED:
1112  ret = DRV_OK;
1113  break;
1114  case DRV_TIM_STATE_TIMEOUT:
1115  ret = DRV_TOUT;
1116  break;
1117  default:
1118  ret = DRV_ERROR_PARAM;
1119  break;
1120  }
1121  return ret;
1122 }
1123 
1142 DRV_STATUS_E DRV_TIM_GetValue(DRV_TIM_HANDLE_T * const ptTim, uint32_t * const ptSoftwareValue, uint32_t * const ptHardwareValue)
1143 {
1144  DRV_HANDLE_CHECK(ptTim);
1145  DRV_LOCK(ptTim);
1146  DRV_STATUS_E ret = DRV_ERROR;
1148  {
1149  if(ptTim->ulSubID <= (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MAX - (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MIN)
1150  {
1151  if(ptSoftwareValue != NULL)
1152  {
1153  *ptSoftwareValue = s_apTIMIrqCntr[DRV_TIM_IRQ_GPIOTIM0 + ptTim->ulSubID];
1154  ret = DRV_OK;
1155  }
1156  if(ptHardwareValue != NULL)
1157  {
1158  *ptHardwareValue = ptTim->ptDevice.ptGpio->gpio_app_counter_cnt[ptTim->ulSubID];
1159  ret = DRV_OK;
1160  }
1161  else
1162  {
1163  ret = DRV_ERROR_PARAM;
1164  }
1165  }
1166  }
1168  {
1169  if(ptTim->ulSubID > (uint32_t) DRV_TIM_DEVICE_ID_TIMER_MAX - (uint32_t) DRV_TIM_DEVICE_ID_TIMER_MIN)
1170  {
1171  ret = DRV_ERROR_PARAM;
1172  }
1173  else
1174  {
1175  if(ptSoftwareValue != NULL)
1176  {
1177  *ptSoftwareValue = s_apTIMIrqCntr[DRV_TIM_IRQ_TIMER0 + ptTim->ulSubID];
1178  ret = DRV_OK;
1179  }
1180  if(ptHardwareValue != NULL)
1181  {
1182  *ptHardwareValue = ptTim->ptDevice.ptTimer->timer_timer[ptTim->ulSubID];
1183  ret = DRV_OK;
1184  }
1185  else
1186  {
1187  ret = DRV_ERROR_PARAM;
1188  }
1189  }
1190  }
1192  {
1193  if(ptSoftwareValue != NULL)
1194  {
1195  *ptSoftwareValue = ptTim->ptDevice.ptTimer->timer_systime_s;
1196  }
1197  if(ptHardwareValue != NULL)
1198  {
1199  *ptHardwareValue = ptTim->ptDevice.ptTimer->timer_systime_ns;
1200  }
1201  else
1202  {
1203  volatile uint32_t ulDummy;
1204  ulDummy = ptTim->ptDevice.ptTimer->timer_systime_ns;
1205  UNUSED(ulDummy);
1206  }
1207  ret = DRV_OK;
1208  }
1210  {
1211  if(ptSoftwareValue != NULL)
1212  {
1213  *ptSoftwareValue = s_apTIMIrqCntr[DRV_TIM_IRQ_SYSTICK + ptTim->ulSubID];
1214  ret = DRV_OK;
1215  }
1216  if(ptHardwareValue != NULL)
1217  {
1218  *ptHardwareValue = ptTim->ptDevice.ptSysTick->VAL;
1219  ret = DRV_OK;
1220  }
1221  }
1223  {
1224 
1226  {
1227  if(ptSoftwareValue != NULL)
1228  {
1229  *ptSoftwareValue = DRV_SYSTIME_LT_DEVICE->intlogic_lt_systime_app_s;
1230  }
1231  if(ptHardwareValue != NULL)
1232  {
1233  *ptHardwareValue = DRV_SYSTIME_LT_DEVICE->intlogic_lt_systime_app_ns;
1234  }
1235  ret = DRV_OK;
1236  }
1238  {
1239  if(ptSoftwareValue != NULL)
1240  {
1241  *ptSoftwareValue = DRV_SYSTIME_LT_DEVICE->intlogic_lt_systime_com_s;
1242  }
1243  if(ptHardwareValue != NULL)
1244  {
1245  *ptHardwareValue = DRV_SYSTIME_LT_DEVICE->intlogic_lt_systime_com_ns;
1246  }
1247  ret = DRV_OK;
1248  }
1250  {
1251  if(ptSoftwareValue != NULL)
1252  {
1253  *ptSoftwareValue = DRV_SYSTIME_LT_DEVICE->intlogic_lt_systime_com_uc_s;
1254  }
1255  if(ptHardwareValue != NULL)
1256  {
1257  *ptHardwareValue = DRV_SYSTIME_LT_DEVICE->intlogic_lt_systime_com_uc_ns;
1258  }
1259  ret = DRV_OK;
1260  }
1261  else
1262  {
1263  ret = DRV_ERROR_PARAM;
1264  }
1265  }
1266  else
1267  {
1268  ret = DRV_ERROR_PARAM;
1269  }
1270  DRV_UNLOCK(ptTim);
1271  /* Return function status */
1272  return ret;
1273 }
1274 
1282 {
1283  DRV_HANDLE_CHECK(ptTim);
1284  DRV_LOCK(ptTim);
1285  DRV_STATUS_E ret = DRV_ERROR;
1287  {
1288  if(ptTim->ulSubID <= (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MAX - (uint32_t) DRV_TIM_DEVICE_ID_GPIOCNTR_MIN)
1289  {
1290  ptTim->tConfiguration.tPreloadValue = tCounterValue;
1291  ptTim->ptDevice.ptGpio->gpio_app_counter_max[ptTim->ulSubID] = tCounterValue;
1292  ret = DRV_OK;
1293  }
1294  else
1295  {
1296  ret = DRV_ERROR_PARAM;
1297  };
1298  }
1300  {
1301  if(ptTim->ulSubID > (uint32_t) DRV_TIM_DEVICE_ID_TIMER_MAX - (uint32_t) DRV_TIM_DEVICE_ID_TIMER_MIN)
1302  {
1303  ret = DRV_ERROR_PARAM;
1304  }
1305  else
1306  {
1307  ptTim->tConfiguration.tPreloadValue = tCounterValue;
1308  ptTim->ptDevice.ptTimer->timer_preload_timer[ptTim->ulSubID] = tCounterValue;
1309  ret = DRV_OK;
1310  }
1311  }
1313  {
1314  ptTim->tConfiguration.tPreloadValue = tCounterValue;
1315  ptTim->ptDevice.ptTimer->timer_compare_systime_s_value = tCounterValue;
1316  ret = DRV_OK;
1317  }
1319  {
1320  ptTim->ptDevice.ptSysTick->LOAD = tCounterValue;
1321  ret = DRV_OK;
1322  }
1324  {
1325  ret = DRV_NSUPP;
1326  }
1327  else
1328  {
1329  ret = DRV_ERROR_PARAM;
1330  }
1331  DRV_UNLOCK(ptTim);
1332  /* Return function status */
1333  return ret;
1334 }
1335 
1342 {
1346 }
1347 
1355 {
1357  {
1358  s_apTIMCallbackTable[DRV_TIM_IRQ_GPIOTIM0](s_apTIMCallbackDriverHandleTable[DRV_TIM_IRQ_GPIOTIM0],
1360  }
1361 }
1362 
1369 {
1373 }
1374 
1382 {
1384  {
1385  s_apTIMCallbackTable[DRV_TIM_IRQ_GPIOTIM1](s_apTIMCallbackDriverHandleTable[DRV_TIM_IRQ_GPIOTIM1],
1387  }
1388 }
1389 
1395 {
1399 }
1400 
1408 {
1410  {
1411  s_apTIMCallbackTable[DRV_TIM_IRQ_GPIOTIM2](s_apTIMCallbackDriverHandleTable[DRV_TIM_IRQ_GPIOTIM2],
1413  }
1414 }
1415 
1421 {
1425 }
1426 
1434 {
1436  {
1438  }
1439 }
1440 
1446 {
1450 }
1451 
1459 {
1461  {
1463  }
1464 }
1465 
1471 {
1475 }
1476 
1484 {
1486  {
1488  }
1489 }
1490 
1496 {
1500 }
1501 
1509 {
1511  {
1514  }
1515 }
1516 
1522 {
1525 }
1526 
1534 {
1536  {
1538  }
1539 }
1540 /* End of group TIM */
1542 
1543 /*lint -restore */
1544 /*lint -restore */
1545 
1546 #endif /* DRV_TIM_MODULE_DISABLED */
#define gpio_xpic_app_gpio_app_cnt_irq_raw_cnt2_Msk
Definition: netx90_app.h:50816
#define DRV_SYSTIME_LT_DEVICE
__IM uint32_t timer_systime_ns
Definition: netx90_app.h:25225
DRV_STATUS_E DRV_TIM_ChannelSetThreshold(DRV_TIM_HANDLE_T *const ptTim, DRV_DIO_ID_T ulChannelID, uint32_t ulTC)
This function sets the threshold used for the specified channel.
Definition: netx_drv_tim.c:933
void TIM1_IRQHandler(void)
This function handles interrupts requests.
DRV_STATUS_E DRV_TIM_GetValue(DRV_TIM_HANDLE_T *const ptTim, uint32_t *const ptSoftwareValue, uint32_t *const ptHardwareValue)
Stores the current counter value.
static void * s_apTIMCallbackHandleTable[DRV_TIM_IRQ_COUNT]
Definition: netx_drv_tim.c:68
__IOM uint32_t timer_timer[3]
Definition: netx90_app.h:25201
__IOM uint32_t gpio_app_counter_cnt[3]
Definition: netx90_app.h:24693
#define DRV_TIMER_DEVICE
#define DRV_LOCK_INITIALIZER
Initializer of the type to be locked as rvalue is in default the mutex initializer.
struct timer_app_Type::@5281::@5295 timer_irq_msk_set_b
#define DRV_DIO_MSK_GPIO_0
#define __WEAK
Definition: cmsis_armcc.h:71
IRQn_Type
Definition: netx90_app.h:57
void DRV_NVIC_DisableIRQ(IRQn_Type IRQn)
This method disables a given interrupt.
__IOM uint32_t CTRL
Definition: core_cm4.h:761
DRV_SYSTIME_LT_DEVICE_T * ptSystimlt
Definition: netx_drv_tim.h:51
DRV_STATUS_E DRV_TIM_SetPreload(DRV_TIM_HANDLE_T *const ptTim, DRV_TIM_PRELOAD_VALUE_E tCounterValue)
Sets a new preload value.
static IRQn_Type const aulIRQnTable[DRV_TIM_IRQ_COUNT]
Table of the IRQ vector numbers.
Definition: netx_drv_tim.c:56
DRV_STATUS_E DRV_TIM_Pause(DRV_TIM_HANDLE_T *const ptTim)
Pauses the TIM generation.
Definition: netx_drv_tim.c:619
#define DRV_TIM_IRQ_COUNT
struct gpio_app_Type::@5163::@5193 gpio_app_cfg_b[8]
DRV_STATUS_E DRV_TIM_GetState(DRV_TIM_HANDLE_T *const ptTim, DRV_TIM_STATE_E *const peState)
Stores the state of the given counter.
__IOM uint32_t gpio_app_counter_max[3]
Definition: netx90_app.h:24682
__IM uint32_t timer_systime_s
Definition: netx90_app.h:25209
struct timer_app_Type::@5265::@5287 timer_config_timer_b[3]
#define SysTick_CTRL_COUNTFLAG_Msk
Definition: core_cm4.h:769
DRV_STATUS_E DRV_TIM_Start(DRV_TIM_HANDLE_T *const ptTim)
Starts the TIM generation.
Definition: netx_drv_tim.c:338
#define SysTick
Definition: core_cm4.h:1562
__IOM uint32_t VAL
Definition: core_cm4.h:763
DRV_TIM_PRELOAD_VALUE_E tPreloadValue
Definition: netx_drv_tim.h:178
void DRV_NVIC_EnableIRQ(IRQn_Type IRQn)
This method enables a given interrupt.
DRV_STATUS_E DRV_TIM_Init(DRV_TIM_HANDLE_T *const ptTim)
Initializes the TIM Base peripheral.
Definition: netx_drv_tim.c:107
SysTick_Type * ptSysTick
Definition: netx_drv_tim.h:50
void DRV_TIM_GPIOTIM0_Callback(void)
This is the callback of the GPIOTIM 0 IRQ.
void SysTick_Handler(void)
This function handles interrupts requests.
DRV_STATUS_E DRV_TIM_ChannelGetCapture(DRV_TIM_HANDLE_T *const ptTim, DRV_DIO_ID_T ulChannelID, uint32_t *const ulValue)
This function gets the captured value of the specified channel.
Definition: netx_drv_tim.c:973
__IOM uint32_t gpio_app_cnt_irq_raw
Definition: netx90_app.h:24820
DRV_DIO_ID_T eDioIdInputReference
Definition: netx_drv_tim.h:182
#define NVIC_EnableIRQ
Definition: core_cm4.h:1611
void TIM0_IRQHandler(void)
This function handles interrupts requests.
__IOM uint32_t LOAD
Definition: core_cm4.h:762
#define DRV_DIO_LINE_MSK_GPIO
void GPIOTIM0_IRQHandler(void)
This function handles interrupts requests.
#define NVIC_DisableIRQ
Definition: core_cm4.h:1613
static DRV_CALLBACK_F s_apTIMCallbackTable[DRV_TIM_IRQ_COUNT]
Used for mapping the handle to an interrupt.
Definition: netx_drv_tim.c:63
void DRV_TIM_TIMER1_Callback(void)
This is the callback of the TIMER 1 IRQ.
#define timer_app_timer_irq_masked_timer1_irq_Msk
Definition: netx90_app.h:47528
DRV_TIM_EXTERNAL_EVENT_TRIGGER_E eExternalEventTrigger
Definition: netx_drv_tim.h:180
DRV_STATUS_E DRV_TIM_Stop(DRV_TIM_HANDLE_T *const ptTim)
Stops the TIM generation.
Definition: netx_drv_tim.c:477
#define DRV_LOCK(__HANDLE__)
A function calling the trylock of the mutex and returning locked in case it is blocked.
#define DRV_TIMER_IRQs
#define DRV_DIO_ID_GPIO_MIN
#define gpio_xpic_app_gpio_app_cnt_irq_raw_cnt1_Msk
Definition: netx90_app.h:50818
#define gpio_xpic_app_gpio_app_cnt_irq_raw_cnt0_Msk
Definition: netx90_app.h:50820
void DRV_TIM_TIMER2_Callback(void)
This is the callback of the TIMER 2 IRQ.
DRV_STATUS_E DRV_TIM_Wait(DRV_TIM_HANDLE_T *const ptTim, uint32_t ulTickCnt)
Waits at least until uSkipCnt events have occurred.
Definition: netx_drv_tim.c:747
DRV_STATUS_E DRV_TIM_DeInit(DRV_TIM_HANDLE_T *const ptTim)
DeInitializes the TIM Base peripheral.
Definition: netx_drv_tim.c:267
void DRV_TIM_GPIOTIM1_Callback(void)
This is the callback of the GPIOTIM 1 IRQ.
DRV_TIM_STATE_E eState
Definition: netx_drv_tim.h:202
DRV_TIM_COUNTING_MODE_E eCountingMode
Definition: netx_drv_tim.h:184
DRV_STATUS_E DRV_TIM_IRQAttach(DRV_TIM_HANDLE_T *const ptTim, DRV_CALLBACK_F pfnUserClb, void *pvUser)
Attaches a given callback to the counter.
DRV_TIM_PRELOAD_VALUE_E
Time structure of the timer driver.
Definition: netx_drv_tim.h:61
DRV_GPIO_DEVICE_T * ptGpio
Definition: netx_drv_tim.h:47
#define timer_app_timer_irq_masked_systime_s_irq_Msk
Definition: netx90_app.h:47524
systime_lt_app (systime_lt_app)
Definition: netx90_app.h:25347
struct timer_app_Type::@5283::@5296 timer_irq_msk_reset_b
This file contains all the functions prototypes for the peripheral module driver. ...
#define timer_app_timer_irq_masked_timer0_irq_Msk
Definition: netx90_app.h:47530
Timer Base Handle Structure definition.
Definition: netx_drv_tim.h:196
DRV_LOCK_T tLock
Definition: netx_drv_tim.h:201
#define DRV_SYSTIME_COMPARE_IRQ
__IOM uint32_t gpio_app_cnt_irq_mask_set
Definition: netx90_app.h:24854
__IOM uint32_t timer_irq_raw
Definition: netx90_app.h:25254
void GPIOTIM1_IRQHandler(void)
This function handles interrupts requests.
#define UNUSED(x)
If there is the need to outsmart the compiler or linter.
Definition: netx_drv_def.h:40
DRV_TIM_DEVICE_ID_E eDeviceID
Definition: netx_drv_tim.h:176
__IOM uint32_t gpio_app_tc[8]
Definition: netx90_app.h:24636
void DRV_TIM_SYSTIME_COMPARE_Callback(void)
This is the callback of the SYSTIME COMPARE IRQ.
#define DRV_DIO_ID_GPIO_MAX
#define DRV_GPIO_DEVICE
DRV_TIM_CONFIGURATION_T tConfiguration
Definition: netx_drv_tim.h:200
Structure type to access the System Timer (SysTick).
Definition: core_cm4.h:759
uint32_t DRV_DIO_ID_T
Type definition for the driver io channel ids.
Definition: netx_drv_dio.h:73
void(* DRV_CALLBACK_F)(void *pvDriverHandle, void *pvUserHandle)
The definition of callbacks used in the driver.
Definition: netx_drv_def.h:48
void GPIOTIM2_IRQHandler(void)
This function handles interrupts requests.
DRV_STATUS_E
DRV Status structures definition.
Definition: netx_drv_def.h:53
#define NVIC_SetPriority
Definition: core_cm4.h:1618
DRV_TIM_SYMMETRIC_E eSymmetric
Definition: netx_drv_tim.h:185
#define DRV_HANDLE_CHECK(handle)
Definition: netx_drv_tim.c:84
void TIM2_IRQHandler(void)
This function handles interrupts requests.
void DRV_TIM_ARMSYSTICK_Callback(void)
This is the callback of the SYSTEM TICK IRQ.
void DRV_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
This method clears the pending state of a given interrupt.
void SYSTIME_IRQHandler(void)
This function handles interrupts requests.
DRV_DIO_MSK_T eDioMskOutputReference
Definition: netx_drv_tim.h:183
struct gpio_app_Type::@5167::@5195 gpio_app_counter_ctrl_b[3]
void DRV_TIM_GPIOTIM2_Callback(void)
This is the callback of the GPIOTIM 2 IRQ.
#define DRV_UNLOCK(__HANDLE__)
The release function used.
#define SysTick_CTRL_CLKSOURCE_Msk
Definition: core_cm4.h:772
#define SysTick_CTRL_ENABLE_Msk
Definition: core_cm4.h:778
#define DRV_GPIO_COUNTER_IRQs
struct timer_app_Type::@5277::@5293 timer_irq_raw_b
__IOM uint32_t timer_irq_msk_set
Definition: netx90_app.h:25284
#define DRV_TIM_IRQ_LIST
DRV_TIM_STATE_E
Enumeration of the timer State.
Definition: netx_drv_tim.h:93
static volatile uint32_t s_apTIMIrqCntr[DRV_TIM_IRQ_COUNT]
Definition: netx_drv_tim.c:78
__IOM uint32_t timer_compare_systime_s_value
Definition: netx90_app.h:25245
__IOM uint32_t gpio_app_cnt_irq_mask_rst
Definition: netx90_app.h:24876
void DRV_TIM_TIMER0_Callback(void)
This is the callback of the TIMER 0 IRQ.
DRV_OPERATION_MODE_E eOperationMode
Definition: netx_drv_tim.h:186
__IOM uint32_t timer_preload_timer[3]
Definition: netx90_app.h:25193
#define __NVIC_PRIO_BITS
Definition: netx90_app.h:157
DRV_TIM_EXTERNAL_EVENT_MODE_E eExternalEventMode
Definition: netx_drv_tim.h:179
#define timer_app_timer_irq_masked_timer2_irq_Msk
Definition: netx90_app.h:47526
#define SysTick_CTRL_TICKINT_Msk
Definition: core_cm4.h:775
__IOM uint32_t timer_irq_msk_reset
Definition: netx90_app.h:25307
DRV_TIM_DEVICE_U ptDevice
Definition: netx_drv_tim.h:199
DRV_TIMER_DEVICE_T * ptTimer
Definition: netx_drv_tim.h:48
static DRV_TIM_HANDLE_T * s_apTIMCallbackDriverHandleTable[DRV_TIM_IRQ_COUNT]
Definition: netx_drv_tim.c:73
DRV_TIM_SYSTIME_REFERENCE_E eSystimeReference
Definition: netx_drv_tim.h:181