Hilscher netX microcontroller driver  V0.0.5.0
Documentation of the netX driver package
netx_drv_eth_xpic.c File Reference
#include "netx_drv_user_conf.h"
#include "netx_drv_eth_xpic.h"
#include <string.h>
Include dependency graph for netx_drv_eth_xpic.c:

Go to the source code of this file.

Macros

#define HAL_ETH_STD_MAC_XPIC_TARGET_NX90_APP
 
#define _HW_CONCAT(a, b)   a ## b
 
#define HW_MSK(bf)    _HW_CONCAT(MSK_NX90_, bf)
 
#define HW_SRT(bf)    _HW_CONCAT(SRT_NX90_, bf)
 
#define HW_DFLT_BF_VAL(bf)   _HW_CONCAT(DFLT_BF_VAL_NX90_, bf)
 
#define HW_DFLT_VAL(reg)    _HW_CONCAT(DFLT_VAL_NX90_, reg)
 
#define HW_REGADR(reg)    _HW_CONCAT(Adr_NX90_, reg)
 
#define HW_AREAADR(area)    _HW_CONCAT(Addr_NX90_, area)
 
#define HW_TYPE(area)    _HW_CONCAT(NX90_, area)
 
#define NX_WRITE32(var, val)   (var) = (val)
 
#define NX_READ32(var)    (var)
 
#define NX_WRITE16(var, val)   (var) = (val)
 
#define NX_READ16(var)    (var)
 
#define NX_WRITE8(var, val)   (var) = (val)
 
#define NX_READ8(var)    (var)
 
#define NX_READMEM(dst, src, len)   memcpy(dst, src, len)
 
#define NX_WRITEMEM(dst, src, len)   memcpy(dst, src, len)
 
#define XcCode_eth_xpic_prg1   XpicCode_eth_xpic_prg1
 
#define PrgSiz_eth_xpic_prg1   XpicCode_eth_xpic_prg1[0]
 
#define TrlSiz_eth_xpic_prg1   XpicCode_eth_xpic_prg1[1]
 
#define PrgSrt_eth_xpic_prg1   &XpicCode_eth_xpic_prg1[2]
 
#define PrgStp_eth_xpic_prg1   &XpicCode_eth_xpic_prg1[3]
 
#define TrlSrt_eth_xpic_prg1   &XpicCode_eth_xpic_prg1[3]
 
#define TrlStp_eth_xpic_prg1   &XpicCode_eth_xpic_prg1[1797]
 
#define ETH_XPIC_INST   0
 
#define ETH_XPIC_PRG   XpicCode_eth_xpic_prg1
 
#define ETH_XPIC_ARMIRQ_ADR   Adr_NX90_mcp_xpic_app_hs_irq_set_raw
 
#define ETH_XPIC_ARMIRQ_VAL   0x00100000
 
#define ETH_XPIC_SHM_BASE   Addr_NX90_intram7
 
#define ETH_XPIC_DFLT_TX_OUTPUT_PHASE   3 /* PosEdge + 5cc */
 
#define OFS_ETH_XPIC_SHM_AREA   0
 
#define ADR_ETH_XPIC_SHM_AREA   (ETH_XPIC_SHM_BASE + OFS_ETH_XPIC_SHM_AREA)
 
#define ADR_ETH_XPIC_FRAME_BUFFER_AREA   (ADR_ETH_XPIC_SHM_AREA + sizeof(ETH_XPIC_SHM_T))
 
#define HOSTPTR_ETH_XPIC_SHM_AREA   (ETH_XPIC_SHM_BASE + OFS_ETH_XPIC_SHM_AREA)
 
#define HOSTPTR_ETH_XPIC_FRAME_BUFFER_AREA   (HOSTPTR_ETH_XPIC_SHM_AREA + sizeof(ETH_XPIC_SHM_T))
 
#define ETH_XPIC_FRAME_BUFFER_AREA_SIZE   (0x8000 - sizeof(ETH_XPIC_SHM_T) - OFS_ETH_XPIC_SHM_AREA)
 
#define ETH_XPIC_FRAMEBUF_CNT   (ETH_XPIC_FRAME_BUFFER_AREA_SIZE / ETH_XPIC_FRAME_BUFFER_SIZE)
 
#define ETH_XPIC_TX_OUTPUT_PHASE   ETH_XPIC_DFLT_TX_OUTPUT_PHASE
 
#define XC_INTRAM_START_ADDRESS   0
 
#define ETH_XPIC_MIIM_LINK_STATUS_REG   1
 
#define ETH_XPIC_MIIM_LINK_STATUS_BIT   2
 
#define ETH_XPIC_MIIM_REQ_LINK   0
 
#define ETH_XPIC_MIIM_REQ_MODE   1
 
#define ETH_XPIC_MIIM_REQ_SPEED   2
 
#define ETH_XPIC_ETH_CFG_PHYMODE   (HW_MSK(eth_config_rx_systime_sfd) | HW_MSK(eth_config_phy_mode))
 
#define ETH_XPIC_ETH_CFG_MACMODE   (HW_MSK(eth_config_rx_systime_sfd) | HW_MSK(eth_config_rx_delay_inputs))
 
#define ETH_XPIC_ETH_TX_CFG_FD
 
#define ETH_XPIC_ETH_TX_CFG_HD   (ETH_XPIC_ETH_TX_CFG_FD | HW_MSK(eth_tx_config_half_duplex))
 
#define ETH_XPIC_PFIFO_DEPTH   (sizeof(XPIC_SHM_PFIFO_EMPTY_PTR_T))
 
#define ETH_XPIC_PFIFO_BORDER   (ETH_XPIC_PFIFO_DEPTH - 1U)
 
#define HOSTPTR_ETH_XPIC_FRAME_BUFFER(elem)   (HOSTPTR_ETH_XPIC_FRAME_BUFFER_AREA + elem * ETH_XPIC_FRAME_BUFFER_SIZE)
 
#define MIIMU_SRT(bf)   HW_SRT(_HW_CONCAT(miimu_, bf))
 
#define MIIMU_MSK(bf)   HW_MSK(_HW_CONCAT(miimu_, bf))
 

Enumerations

enum  DRV_ETH_XPIC_STATE {
  DRV_ETH_XPIC_STATE_UNDEF = 0,
  DRV_ETH_XPIC_STATE_RESET,
  DRV_ETH_XPIC_STATE_INITIALIZED,
  DRV_ETH_XPIC_STATE_RUNNING
}
 

Functions

DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_Reset (void *pvUser)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_Initialize (DRV_ETH_XPIC_CONFIG_T const *ptConfig, void *pvUser)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_SetMacAddr (uint8_t const *pabMacAdr)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_GetMacAddr (uint8_t *pabMacAdr)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_SetParam (DRV_ETH_XPIC_PARAM eParam, uint32_t ulValue)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_GetParam (DRV_ETH_XPIC_PARAM eParam, uint32_t *pulValue)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_Start (void *pvUser)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_GetConfirmIrq (uint32_t *pulIrq)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_GetFrame (ETH_FRAMEBUF_T **pptFrame)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_Send (ETH_FRAMEBUF_T *ptFrame, bool fConfirm, bool fHiPriority)
 
unsigned int DRV_ETH_Xpic_GetSendCnfFillLevel (void)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_GetSendCnf (ETH_FRAMEBUF_T **pptFrame, ETH_XPIC_CNF_ERR *pErrorCode)
 
unsigned int DRV_ETH_Xpic_GetRecvFillLevel (bool fHiPriority)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_Recv (ETH_FRAMEBUF_T **pptFrame, bool fHiPriority)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_ReleaseFrame (ETH_FRAMEBUF_T *ptFrame)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_GetCounters (XPIC_SHM_CNT_T *ptMacCounter)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_ReadPhyReg (unsigned int uMiimuPreamble, unsigned int uMiimuMdcFreq, unsigned int uMiimuRtaField, unsigned int uMiimuPhyAddr, unsigned int uMiimuReqAddr, uint16_t *pusData, void *pvUser)
 
DRV_ETH_XPIC_RESULT DRV_ETH_Xpic_WritePhyReg (unsigned int uMiimuPreamble, unsigned int uMiimuMdcFreq, unsigned int uMiimuPhyAddr, unsigned int uMiimuReqAddr, uint16_t usData, void *pvUser)
 

Variables

const uint32_t BuildTime_eth_xpic_prg1 [7] = { 53, 55, 6, 3, 8, 119, 1567493753 }
 
const uint32_t XpicCode_eth_xpic_prg1 [1797]
 
static uint32_t *const s_apulXpicDram [] = { (uint32_t*) Addr_NX90_xpic_app_dram }
 
static volatile DRV_ETH_XPIC_STATE s_eState = DRV_ETH_XPIC_STATE_UNDEF
 
static uint8_t s_abMacAdr [6] = { 0, 1, 2, 3, 4, 5 }
 
static ETH_XPIC_SHM_AREA_T * s_ptXpicShm = NULL