Hilscher netX microcontroller driver  V0.0.5.0
Documentation of the netX driver package
xlink4_Type Struct Reference

xlink4 (xlink4) More...

#include <netx90_app.h>

Collaboration diagram for xlink4_Type:
Collaboration graph

Data Fields

union {
   __IOM uint32_t   xlink_cfg
 
   struct {
      __IOM uint32_t   rate_inc: 16
 
      __IOM uint32_t   xlink_en: 1
 
      __IOM uint32_t   fb_en: 1
 
      __IOM uint32_t   bclk2oe_en: 1
 
      __IOM uint32_t   cnt_da: 1
 
      __IOM uint32_t   bits2rec: 4
 
      __IOM uint32_t   start_spl: 4
 
      __IOM uint32_t   end_spl: 4
 
   }   xlink_cfg_b
 
}; 
 
union {
   __IOM uint32_t   xlink_tx
 
   struct {
      __IOM uint32_t   hold: 16
 
      __IOM uint32_t   rdy_ro: 1
 
      __IOM uint32_t   idle_ro: 1
 
      __IOM uint32_t   bf_align0: 14
 
   }   xlink_tx_b
 
}; 
 
union {
   __IOM uint32_t   xlink_rx
 
   struct {
      __IOM uint32_t   hold_ro: 16
 
      __IOM uint32_t   rdy_ro: 1
 
      __IOM uint32_t   bf_align0: 2
 
      __IOM uint32_t   rxd_ro: 1
 
      __IOM uint32_t   ovf_err_ro: 1
 
      __IOM uint32_t   spl_err_ro: 1
 
      __IOM uint32_t   bf_align1: 10
 
   }   xlink_rx_b
 
}; 
 
union {
   __IOM uint32_t   xlink_stat
 
   struct {
      __IOM uint32_t   bit_cnt_ro: 16
 
      __IOM uint32_t   bit_clk_ro: 1
 
      __IOM uint32_t   txo_ro: 1
 
      __IOM uint32_t   rxo_ro: 1
 
      __IOM uint32_t   txoe_ro: 1
 
      __IOM uint32_t   io_mode: 1
 
      __IOM uint32_t   set_tx: 1
 
      __IOM uint32_t   set_txoe: 1
 
      __IOM uint32_t   set_wakeup: 1
 
      __IOM uint32_t   filter_en: 1
 
      __IOM uint32_t   bf_align0: 7
 
   }   xlink_stat_b
 
}; 
 

Detailed Description

xlink4 (xlink4)

Definition at line 33472 of file netx90_app.h.

Field Documentation

union { ... }

< (@ 0xFF900440) xlink4 Structure

union { ... }
union { ... }
union { ... }
__IOM uint32_t xlink4_Type::bclk2oe_en

[18..18] test feature, do not set this bit!

Definition at line 33486 of file netx90_app.h.

__IOM uint32_t xlink4_Type::bf_align0

[31..18] bitField alignment value for aeabi compatibility

[18..17] bitField alignment value for aeabi compatibility

[31..25] bitField alignment value for aeabi compatibility

Definition at line 33511 of file netx90_app.h.

__IOM uint32_t xlink4_Type::bf_align1

[31..22] bitField alignment value for aeabi compatibility

Definition at line 33532 of file netx90_app.h.

__IOM uint32_t xlink4_Type::bit_clk_ro

[16..16] status of bit clock signal

Definition at line 33543 of file netx90_app.h.

__IOM uint32_t xlink4_Type::bit_cnt_ro

[15..0] status of bit clock counter

Definition at line 33542 of file netx90_app.h.

__IOM uint32_t xlink4_Type::bits2rec

[23..20] count of bits to receive note: the reset value expect: 1stopbit, 8databits, 1paritybit and 1stopbit

Definition at line 33488 of file netx90_app.h.

__IOM uint32_t xlink4_Type::cnt_da

[19..19] test feature, do not set this bit!

Definition at line 33487 of file netx90_app.h.

__IOM uint32_t xlink4_Type::end_spl

[31..28] end sample point for receive data

Definition at line 33494 of file netx90_app.h.

__IOM uint32_t xlink4_Type::fb_en

[17..17] test feature, enable internal feedback

Definition at line 33485 of file netx90_app.h.

__IOM uint32_t xlink4_Type::filter_en

[24..24] enable 3 majority ruling filter

Definition at line 33553 of file netx90_app.h.

__IOM uint32_t xlink4_Type::hold

[15..0] hold register format for a valid serial DATA sequence: <-ctrl.DATA-><----------------— serial DATA -----------------—> { END_BIT:1 }[{STOPBIT:1}{DATABITS max. 12:0101..0010}{STARTBIT:0}] notes: ENDBIT is a hardware marker to stop the shifting, and will not be transmitted. this condition implied, than all other not used bits should be zero

Definition at line 33502 of file netx90_app.h.

__IOM uint32_t xlink4_Type::hold_ro

[15..0] RX byte (when valid) hold[15:0] is used to shift in RX(LSB first!) the amount of shifted bits is defined by bits2rec shift order is bit15 downto bit0

Definition at line 33521 of file netx90_app.h.

__IOM uint32_t xlink4_Type::idle_ro

[17..17] indicates no activity on tx

Definition at line 33510 of file netx90_app.h.

__IOM uint32_t xlink4_Type::io_mode

[20..20] enable the io mode on tx and wakeup 0 : disable io function on tx, txoe, wakeup 1 : enable io function on tx, txoe, wakeup

Definition at line 33547 of file netx90_app.h.

__IOM uint32_t xlink4_Type::ovf_err_ro

[20..20] overflow error on received data

Definition at line 33528 of file netx90_app.h.

__IOM uint32_t xlink4_Type::rate_inc

[15..0] bitrate compare value for bit clock counter (bit_cnt) BITRATE = 100e6/(rate_inc) typical settings for IOLINK: {| cols=4 BIT_RATE | rate_inc | clock period | calc: 1/BIT_RATE 4800 | 0x5160 | 208,33 us | 208,3333us 38400 | 0xa2b | 26,04 us | 26,04167us 230400 | 0x1b1 | 4,34 us | 4,340278us ... | | invalid: 0 | 0 | 0 | 0 }

Definition at line 33478 of file netx90_app.h.

__IOM uint32_t xlink4_Type::rdy_ro

[16..16] TX buffer ready (valid on ready) 0 TX buffer not ready 1 TX buffer ready

[16..16] RX buffer ready (valid on ready) 0 RX buffer not ready 1 RX buffer ready

Definition at line 33508 of file netx90_app.h.

__IOM uint32_t xlink4_Type::rxd_ro

[19..19] current status of rx data

Definition at line 33527 of file netx90_app.h.

__IOM uint32_t xlink4_Type::rxo_ro

[18..18] status of rx input

Definition at line 33545 of file netx90_app.h.

__IOM uint32_t xlink4_Type::set_tx

[21..21] set the tx port,

Definition at line 33550 of file netx90_app.h.

__IOM uint32_t xlink4_Type::set_txoe

[22..22] set the tx output enable

Definition at line 33551 of file netx90_app.h.

__IOM uint32_t xlink4_Type::set_wakeup

[23..23] set the wakeup port

Definition at line 33552 of file netx90_app.h.

__IOM uint32_t xlink4_Type::spl_err_ro

[21..21] sampling error detected if the amount of sampled bits (HI or LOW) do not fulfill the condition: (end_spl - start_spl) < (count of HI/LOW bits)

Definition at line 33529 of file netx90_app.h.

__IOM uint32_t xlink4_Type::start_spl

[27..24] start sample point for receive data a sample period is defined as 1/16 of the bitrate period range: 0x0 - 0xf note: settings for start_spl and end_spl should always fulfill the condition: (start_spl < end_spl)

Definition at line 33490 of file netx90_app.h.

__IOM uint32_t xlink4_Type::txo_ro

[17..17] status of tx output

Definition at line 33544 of file netx90_app.h.

__IOM uint32_t xlink4_Type::txoe_ro

[19..19] status of tx output enable

Definition at line 33546 of file netx90_app.h.

__IOM uint32_t xlink4_Type::xlink_cfg

(@ 0x00000000) configuration register

Definition at line 33475 of file netx90_app.h.

struct { ... } xlink4_Type::xlink_cfg_b
__IOM uint32_t xlink4_Type::xlink_en

[16..16] disable the output enable, and activity

Definition at line 33484 of file netx90_app.h.

__IOM uint32_t xlink4_Type::xlink_rx

(@ 0x00000008) xlink RX register writing to the register, reset the ready bit, the overflow bit and the sampling error bit

Definition at line 33516 of file netx90_app.h.

struct { ... } xlink4_Type::xlink_rx_b
__IOM uint32_t xlink4_Type::xlink_stat

(@ 0x0000000C) xlink status register & io control writing to this register set the bit clock counter to zero!

Definition at line 33537 of file netx90_app.h.

struct { ... } xlink4_Type::xlink_stat_b
__IOM uint32_t xlink4_Type::xlink_tx

(@ 0x00000004) xlink transmit register

Definition at line 33499 of file netx90_app.h.

struct { ... } xlink4_Type::xlink_tx_b

The documentation for this struct was generated from the following file: