uart_xpic_app (uart_xpic_app) More...

#include <netx90_app.h>

Collaboration diagram for uart_xpic_app_Type:

Data Fields
union {
__IOM uint32_t uartdr

struct {
__IOM uint32_t DATA: 8

__IOM uint32_t FE: 1

__IOM uint32_t PE: 1

__IOM uint32_t BE: 1

__IOM uint32_t bf_align0: 21

} uartdr_b

};

union {
__IOM uint32_t uartrsr

struct {
__IOM uint32_t FE: 1

__IOM uint32_t PE: 1

__IOM uint32_t BE: 1

__IOM uint32_t OE: 1

__IOM uint32_t bf_align0: 28

} uartrsr_b

};

union {
__IOM uint32_t uartlcr_h

struct {
__IOM uint32_t BRK: 1

__IOM uint32_t PEN: 1

__IOM uint32_t EPS: 1

__IOM uint32_t STP2: 1

__IOM uint32_t FEN: 1

__IOM uint32_t WLEN: 2

__IOM uint32_t bf_align0: 25

} uartlcr_h_b

};

union {
__IOM uint32_t uartlcr_m

struct {
__IOM uint32_t BAUDDIVMS: 8

__IOM uint32_t bf_align0: 24

} uartlcr_m_b

};

union {
__IOM uint32_t uartlcr_l

struct {
__IOM uint32_t BAUDDIVLS: 8

__IOM uint32_t bf_align0: 24

} uartlcr_l_b

};

union {
__IOM uint32_t uartcr

struct {
__IOM uint32_t uartEN: 1

__IOM uint32_t SIREN: 1

__IOM uint32_t SIRLP: 1

__IOM uint32_t MSIE: 1

__IOM uint32_t RIE: 1

__IOM uint32_t TIE: 1

__IOM uint32_t RTIE: 1

__IOM uint32_t LBE: 1

__IOM uint32_t TX_RX_LOOP: 1

__IOM uint32_t bf_align0: 23

} uartcr_b

};

union {
__IM uint32_t uartfr

struct {
__IM uint32_t CTS: 1

__IM uint32_t DSR: 1

__IM uint32_t DCD: 1

__IM uint32_t BUSY: 1

__IM uint32_t RXFE: 1

__IM uint32_t TXFF: 1

__IM uint32_t RXFF: 1

__IM uint32_t TXFE: 1

__IM uint32_t bf_align0: 24

} uartfr_b

};

union {
__IOM uint32_t uartiir

struct {
__IOM uint32_t MIS: 1

__IOM uint32_t RIS: 1

__IOM uint32_t TIS: 1

__IOM uint32_t RTIS: 1

__IOM uint32_t bf_align0: 28

} uartiir_b

};

union {
__IOM uint32_t uartilpr

struct {
__IOM uint32_t ILPDVSR: 8

__IOM uint32_t bf_align0: 24

} uartilpr_b

};

union {
__IOM uint32_t uartrts

struct {
__IOM uint32_t AUTO: 1

__IOM uint32_t RTS: 1

__IOM uint32_t COUNT: 1

__IOM uint32_t MOD2: 1

__IOM uint32_t RTS_pol: 1

__IOM uint32_t CTS_ctr: 1

__IOM uint32_t CTS_pol: 1

__IOM uint32_t STICK: 1

__IOM uint32_t bf_align0: 24

} uartrts_b

};

union {
__IOM uint32_t uartforerun

struct {
__IOM uint32_t FORERUN: 8

__IOM uint32_t bf_align0: 24

} uartforerun_b

};

union {
__IOM uint32_t uarttrail

struct {
__IOM uint32_t TRAIL: 8

__IOM uint32_t bf_align0: 24

} uarttrail_b

};

union {
__IOM uint32_t uartdrvout

struct {
__IOM uint32_t DRVTX: 1

__IOM uint32_t DRVRTS: 1

__IOM uint32_t bf_align0: 30

} uartdrvout_b

};

union {
__IOM uint32_t uartcr_2

struct {
__IOM uint32_t Baud_Rate_Mode: 1

__IOM uint32_t oversampling_8x: 1

__IOM uint32_t bf_align0: 30

} uartcr_2_b

};

union {
__IOM uint32_t uartrxiflsel

struct {
__IOM uint32_t RXIFLSEL: 5

__IOM uint32_t RXDMA: 1

__IOM uint32_t bf_align0: 26

} uartrxiflsel_b

};

union {
__IOM uint32_t uarttxiflsel

struct {
__IOM uint32_t TXIFLSEL: 5

__IOM uint32_t TXDMA: 1

__IOM uint32_t bf_align0: 26

} uarttxiflsel_b

};

Detailed Description

uart_xpic_app (uart_xpic_app)

Definition at line 31927 of file netx90_app.h.

Field Documentation

union { ... }

< (@ 0xFF900300) uart_xpic_app Structure

union { ... }

__IOM uint32_t uart_xpic_app_Type::AUTO

[0..0] automatic or controlled by the next bit (RTS)

Definition at line 32053 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::Baud_Rate_Mode

[0..0] If this bit is set the baud rate is generated more exactly by the following formula: value = ( (Baud Rate * 16) / System Frequency ) * 2^16 . You have to write this 16-bit value in register uartlcr_l and uartlcr_m.

Definition at line 32097 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::BAUDDIVLS

[7..0] Baud Divisor Least Significant Byte use lower byte of bauddiv = (system clk / (16 * baud rate)) - 1 if not alternative settings by register uartcr_2 are done

Definition at line 31987 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::BAUDDIVMS

[7..0] bauddiv : Baud Divisor Most Significant Byte use higher byte of bauddiv = (system clk / (16 * baud rate)) - 1 if not alternative settings by register uartcr_2 are done

Definition at line 31976 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::BE

[10..10] Break Error, read only, mirrored from uartrsr, to handle in DMA-read-out data

[2..2] Break Error

Definition at line 31938 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::bf_align0

[31..11] bitField alignment value for aeabi compatibility

[31..4] bitField alignment value for aeabi compatibility

[31..7] bitField alignment value for aeabi compatibility

[31..8] bitField alignment value for aeabi compatibility

[31..9] bitField alignment value for aeabi compatibility

[31..2] bitField alignment value for aeabi compatibility

[31..6] bitField alignment value for aeabi compatibility

Definition at line 31940 of file netx90_app.h.

__IM uint32_t uart_xpic_app_Type::bf_align0

[31..8] bitField alignment value for aeabi compatibility

Definition at line 32023 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::BRK

[0..0] Send Break

Definition at line 31961 of file netx90_app.h.

__IM uint32_t uart_xpic_app_Type::BUSY

[3..3] uart BUSY

Definition at line 32018 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::COUNT

[2..2] count base: 1=system clocks, 0=time in bauds

Definition at line 32055 of file netx90_app.h.

__IM uint32_t uart_xpic_app_Type::CTS

[0..0] Clear To Send

Definition at line 32015 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::CTS_ctr

[5..5] nUARTCTS control

Definition at line 32058 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::CTS_pol

[6..6] nUARTCTS polarity: 1=active high

Definition at line 32059 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::DATA

[7..0] data read or written from the interface

Definition at line 31933 of file netx90_app.h.

__IM uint32_t uart_xpic_app_Type::DCD

[2..2] Data Carrier Detect

Definition at line 32017 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::DRVRTS

[1..1] enable driver for RTS

Definition at line 32088 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::DRVTX

[0..0] enable driver for TX

Definition at line 32087 of file netx90_app.h.

__IM uint32_t uart_xpic_app_Type::DSR

[1..1] Data Set Ready

Definition at line 32016 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::EPS

[2..2] Even Parity Select

Definition at line 31963 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::FE

[8..8] Framing Error, read only, mirrored from uartrsr, to handle in DMA-read-out data

[0..0] Framing Error

Definition at line 31934 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::FEN

[4..4] FIFO Enable

Definition at line 31965 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::FORERUN

[7..0] number of forerun cycles in system clocks or bauds

Definition at line 32069 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::ILPDVSR

[7..0] IrDA Low Power Divisor

Definition at line 32044 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::LBE

[7..7] Loop Back Enable for IrDA mode

Definition at line 32005 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::MIS

[0..0] Modem Interrupt Status

Definition at line 32032 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::MOD2

[3..3] mode1/mode2

Definition at line 32056 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::MSIE

[3..3] Modem Status Interrupt Enable

Definition at line 32001 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::OE

[3..3] Overrun Error

Definition at line 31952 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::oversampling_8x

[1..1] Oversampling mode: 0: Use default 16x oversampling. 1: Use reduced accuracy 8x oversampling. This can be used to increase the max. baudrate. When selected, the configured baudrate will be doubled. Note that the bit reception is more error-prone in noisy environments.

Definition at line 32101 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::PE

[9..9] Parity Error, read only, mirrored from uartrsr, to handle in DMA-read-out data

[1..1] Parity Error

Definition at line 31936 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::PEN

[1..1] Parity Enalble

Definition at line 31962 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::RIE

[4..4] Receive Interrupt Enable

Definition at line 32002 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::RIS

[1..1] Receive Interrupt Status

Definition at line 32033 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::RTIE

[6..6] Receive Timeout Interrupt Enable

Definition at line 32004 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::RTIS

[3..3] Receive Timeout Interrupt Status

Definition at line 32035 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::RTS

[1..1] if AUTO=0: controlled by this bit

Definition at line 32054 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::RTS_pol

[4..4] RTS polarity: 1=active high

Definition at line 32057 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::RXDMA

[5..5] Enable DMA-requests for RX-fifo-data. A request will be generated if RX-FIFO is not empty and uartcr.uartEN (module enable) is set. Burst request to DMA-Ctrl will be done if the RX-FIFO contains at least 4 words (set DMA-burst-size to 4) If this bit is reset or the module is disabled, DMA-request will also be reset. single transfer request: RX-FIFO contains 1 byte or more, burst request: 4 bytes or more note: set adr_dmac_chctrl.SBSize = 1 (i.e. burst size: 4) in the DMA module

Definition at line 32118 of file netx90_app.h.

__IM uint32_t uart_xpic_app_Type::RXFE

[4..4] Receive FIFO Empty

Definition at line 32019 of file netx90_app.h.

__IM uint32_t uart_xpic_app_Type::RXFF

[6..6] Receive FIFO Full

Definition at line 32021 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::RXIFLSEL

[4..0] Choose a number between 1 and 16. It defines the IRQ trigger level of the receive fifo. The IRQ (UARTRXINTR) will be set if the number of received bytes in the receive fifo are greater than or equal RXIFLSEL.

Definition at line 32114 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::SIREN

[1..1] SIR Enable

Definition at line 31999 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::SIRLP

[2..2] IrDA SIR Low Power Mode

Definition at line 32000 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::STICK

[7..7] stick parity

Definition at line 32060 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::STP2

[3..3] 2 Stop Bits Select

Definition at line 31964 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::TIE

[5..5] Transmit Interrupt Enable

Definition at line 32003 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::TIS

[2..2] Transmit Interrupt Status

Definition at line 32034 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::TRAIL

[7..0] number of trail cycles in system clocks or bauds

Definition at line 32078 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::TX_RX_LOOP

[8..8] internal loop (TX -> RX) (test purpose only)

Definition at line 32006 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::TXDMA

[5..5] Enable DMA-requests for TX-fifo-data. A request will be generated if TX-FIFO is not full and uartcr.uartEN (module enable) is set. Burst request to DMA-Ctrl will be done if at least 4 words are writable to the TX-FIFO (set DMA-burst-size to 4) If this bit is reset or the module is disabled, DMA-request will also be reset. note: set adr_dmac_chctrl.DBSize = 1 (i.e. burst size: 4) in the DMA module

Definition at line 32139 of file netx90_app.h.

__IM uint32_t uart_xpic_app_Type::TXFE

[7..7] Transmit FIFO Empty

Definition at line 32022 of file netx90_app.h.

__IM uint32_t uart_xpic_app_Type::TXFF

[5..5] Transmit FIFO Full

Definition at line 32020 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::TXIFLSEL

[4..0] Choose a number between 1 and 16. It defines the IRQ trigger level of the transmit fifo. The IRQ (UARTTXINTR) will be set if the number of transmitted bytes in the transmit fifo are less than TXIFLSEL.

Definition at line 32135 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::uartcr

(@ 0x00000014) uart control Register

Definition at line 31995 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::uartcr_2

(@ 0x00000034) Control Register 2

Definition at line 32094 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uartcr_2_b

struct { ... } uart_xpic_app_Type::uartcr_b

__IOM uint32_t uart_xpic_app_Type::uartdr

(@ 0x00000000) data read or written from the interface

Definition at line 31930 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uartdr_b

__IOM uint32_t uart_xpic_app_Type::uartdrvout

(@ 0x00000030) Drive Output

Definition at line 32084 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uartdrvout_b

__IOM uint32_t uart_xpic_app_Type::uartEN

[0..0] uart Enable

Definition at line 31998 of file netx90_app.h.

__IOM uint32_t uart_xpic_app_Type::uartforerun

(@ 0x00000028) RTS forerun cycles

Definition at line 32066 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uartforerun_b

__IM uint32_t uart_xpic_app_Type::uartfr

(@ 0x00000018) uart Flag Register

Definition at line 32012 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uartfr_b

__IOM uint32_t uart_xpic_app_Type::uartiir

(@ 0x0000001C) Interrupt Identification (read) / interrupt clear (write)

Definition at line 32028 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uartiir_b

__IOM uint32_t uart_xpic_app_Type::uartilpr

(@ 0x00000020) IrDA Low Power Counter Register

Definition at line 32041 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uartilpr_b

__IOM uint32_t uart_xpic_app_Type::uartlcr_h

(@ 0x00000008) Line control Register, high byte

Definition at line 31958 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uartlcr_h_b

__IOM uint32_t uart_xpic_app_Type::uartlcr_l

(@ 0x00000010) Line control Register, low byte

Definition at line 31984 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uartlcr_l_b

__IOM uint32_t uart_xpic_app_Type::uartlcr_m

(@ 0x0000000C) Line control Register, middle byte

Definition at line 31973 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uartlcr_m_b

__IOM uint32_t uart_xpic_app_Type::uartrsr

(@ 0x00000004) receive status register (read) / Error Clear Register (write)

Definition at line 31945 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uartrsr_b

__IOM uint32_t uart_xpic_app_Type::uartrts

(@ 0x00000024) RTS Control Register

Definition at line 32050 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uartrts_b

__IOM uint32_t uart_xpic_app_Type::uartrxiflsel

(@ 0x00000038) RX FIFO trigger level and RX-DMA enable

Definition at line 32111 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uartrxiflsel_b

__IOM uint32_t uart_xpic_app_Type::uarttrail

(@ 0x0000002C) RTS trail cycles

Definition at line 32075 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uarttrail_b

__IOM uint32_t uart_xpic_app_Type::uarttxiflsel

(@ 0x0000003C) TX FIFO trigger level and TX-DMA enable

Definition at line 32132 of file netx90_app.h.

struct { ... } uart_xpic_app_Type::uarttxiflsel_b

__IOM uint32_t uart_xpic_app_Type::WLEN

[6..5] Word Length '00' 5 bits '01' 6 bits '10' 7 bits '11' 8 bits

Definition at line 31966 of file netx90_app.h.

The documentation for this struct was generated from the following file:

netx90_app.h

Data Fields

Detailed Description

Field Documentation