1 ;/**************************************************************************//**
2 ; * @file startup_netx90_app.s
3 ; * @brief CMSIS Cortex-M ARMv7-M based Core Device Startup File for
4 ; * ARMCM4 Device netx90_app
6 ; * @date 02. March 2016
7 ; ******************************************************************************/
9 ; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
11 ; * SPDX-License-Identifier: Apache-2.0
13 ; * Licensed under the Apache License, Version 2.0 (the License); you may
14 ; * not use this file except in compliance with the License.
15 ; * You may obtain a copy of the License at
17 ; * www.apache.org/licenses/LICENSE-2.0
19 ; * Unless required by applicable law or agreed to in writing, software
20 ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 ; * See the License for the specific language governing permissions and
23 ; * limitations under the License.
27 ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
31 ; <h> Stack Configuration
32 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
35 Stack_Size EQU 0x00000400
37 AREA STACK, NOINIT, READWRITE, ALIGN=3
38 Stack_Mem SPACE Stack_Size
42 ; <h> Heap Configuration
43 ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
46 Heap_Size EQU 0x00000C00
48 AREA HEAP, NOINIT, READWRITE, ALIGN=3
50 Heap_Mem SPACE Heap_Size
58 ; Vector Table Mapped to Address 0 at Reset
60 AREA RESET, DATA, READONLY
65 __Vectors DCD __initial_sp ; Top of Stack
66 DCD Reset_Handler ; Reset Handler
67 DCD NMI_Handler ; NMI Handler
68 DCD HardFault_Handler ; Hard Fault Handler
69 DCD MemManage_Handler ; MPU Fault Handler
70 DCD BusFault_Handler ; Bus Fault Handler
71 DCD UsageFault_Handler ; Usage Fault Handler
76 DCD SVC_Handler ; SVCall Handler
77 DCD DebugMon_Handler ; Debug Monitor Handler
79 DCD PendSV_Handler ; PendSV Handler
80 DCD SysTick_Handler ; SysTick Handler
83 DCD SW_IRQHandler ; 0: software
84 DCD TIM0_IRQHandler ; 1: timer_app0
85 DCD TIM1_IRQHandler ; 2: timer_app1
86 DCD TIM2_IRQHandler ; 3: timer_app2
87 DCD SYSTIME_IRQHandler ; 4: timer_app_systime_s
88 DCD WDG_IRQHandler ; 5: wdg_app
89 DCD DMAC_IRQHandler ; 6: dmac_app
90 DCD MCP_IRQHandler ; 7: mcp_app
91 DCD UART_IRQHandler ; 8: uart_app
92 DCD I2C_IRQHandler ; 9: i2c-app
93 DCD I2CXPIC_IRQHandler ; 10: i2c_xpic_app
94 DCD ECC1_IRQHandler ; 11: ecc_app_1bit_error
95 DCD XPICDEBUG_IRQHandler ; 12: xpic_debug_app
96 DCD WDGXPIC_IRQHandler ; 13: wdg_xpic_app_arm
97 DCD NFIFO_ARM_APP_IRQHandler ; 14: nfifo_arm_app
98 DCD IOLINK_IRQHandler ; 15: io_link_irq_xpic_app
99 DCD SPI0_IRQHandler ; 16: spi0_app
100 DCD SPI1_IRQHandler ; 17: spi1_app
101 DCD SPI2_IRQHandler ; 18: spi2_app
102 DCD SPIXPIC_IRQHandler ; 19: spi_xpic_app
103 DCD UARTAPP_IRQHandler ; 20: uart_app
104 DCD UARTXPIC_IRQHandler ; 21: uart_xpic_app
105 DCD ASIC_IRQHandler ; 22: bod
106 DCD CLKSUP_IRQHandler ; 23: clksup_app
107 DCD SQI_IRQHandler ; 24: sqi
108 DCD HIFPIO_IRQHandler ; 25: hif_pio_arm
109 DCD ETH_IRQHandler ; 26: eth
110 DCD HASH_IRQHandler ; 27: hash
111 DCD AES_IRQHandler ; 28: aes
112 DCD MTGY_IRQHandler ; 29: mtgy
113 DCD HIFRDY_IRQHandler ; 30: hif_rdy_to
114 DCD IDPM_IRQHandler ; 31: idpm_com_host
115 DCD HSC0_IRQHandler ; 32: hanshake channel 0
116 DCD HSC1_IRQHandler ; 33: hanshake channel 1
117 DCD HSC2_IRQHandler ; 34: hanshake channel 2
118 DCD HSC3_IRQHandler ; 35: hanshake channel 3
119 DCD HSC4_IRQHandler ; 36: hanshake channel 4
120 DCD HSC5_IRQHandler ; 37: hanshake channel 5
121 DCD HSC6_IRQHandler ; 38: hanshake channel 6
122 DCD HSC7_IRQHandler ; 39: hanshake channel 7
123 DCD HSC8TO15_IRQHandler ; 40: hanshake channel 8 to 15
124 DCD ENDAT1_IRQHandler ; 41: endat_app0
125 DCD ENDAT2_IRQHandler ; 42: endat_app1
126 DCD BISS0_IRQHandler ; 43: biss_app0
127 DCD BISS1_IRQHandler ; 44: biss_app1
128 DCD MADC0_IRQHandler ; 45: madc_seq0
129 DCD MADC1_IRQHandler ; 46: madc_seq1
130 DCD MADC2_IRQHandler ; 47: madc_seq2
131 DCD MADC3_IRQHandler ; 48: madc_seq3
132 DCD MPWM_IRQHandler ; 49: mpwm
133 DCD MENC0_IRQHandler ; 50: menc_app_irq_enc0
134 DCD MENC1_IRQHandler ; 51: menc_app_irq_enc1
135 DCD MENCCAP_IRQHandler ; 52: menc_app_irq_cap_mp
136 DCD MENCERR_IRQHandler ; 53: menc_app_irq_err
137 DCD GPIO0_IRQHandler ; 54: gpio_app0
138 DCD GPIO1_IRQHandler ; 55: gpio_app1
139 DCD GPIO2_IRQHandler ; 56: gpio_app2
140 DCD GPIO3_IRQHandler ; 57: gpio_app3
141 DCD GPIO4_IRQHandler ; 58: gpio_app4
142 DCD GPIO5_IRQHandler ; 59: gpio_app5
143 DCD GPIO6_IRQHandler ; 60: gpio_app6
144 DCD GPIO7_IRQHandler ; 61: gpio_app7
145 DCD GPIOTIM0_IRQHandler ; 62: gpio_app_timer0
146 DCD GPIOTIM0_IRQHandler ; 63: gpio_app_timer1
147 DCD GPIOTIM0_IRQHandler ; 64: gpio_app_timer2
148 DCD PIO0_IRQHandler ; 65: pio0_app
149 DCD PIO1_IRQHandler ; 66: pio1_app
150 DCD PIO2_IRQHandler ; 67: pio2_app
151 DCD PIO3_IRQHandler ; 68: pio3_app
152 DCD XCTRIGGER0_IRQHandler ; 69: trigger_out_edge0
153 DCD XCTRIGGER1_IRQHandler ; 70: trigger_out_edge1
154 DCD CAN0_IRQHandler ; 71: can_ctrl0_app
155 DCD CAN1_IRQHandler ; 72: can_ctrl1_app
156 DCD SQI0_IRQHandler ; 73: sqi0_app
157 DCD SQI1_IRQHandler ; 74: sqi1_app
158 DCD CTI0_IRQHandler ; 75: cti0_arm_app
159 DCD CTI1_IRQHandler ; 76: cti1_arm_app
160 DCD FPU_IRQHandler ; 77: fpu_arm_app
182 __Vectors_Size EQU __Vectors_End - __Vectors
184 AREA |.text|, CODE, READONLY
190 EXPORT Reset_Handler [WEAK]
200 ; Dummy Exception Handlers (infinite loops which can be modified)
204 EXPORT NMI_Handler [WEAK]
209 EXPORT HardFault_Handler [WEAK]
214 EXPORT MemManage_Handler [WEAK]
219 EXPORT BusFault_Handler [WEAK]
224 EXPORT UsageFault_Handler [WEAK]
229 EXPORT SVC_Handler [WEAK]
234 EXPORT DebugMon_Handler [WEAK]
239 EXPORT PendSV_Handler [WEAK]
244 EXPORT SysTick_Handler [WEAK]
250 EXPORT SW_IRQHandler [WEAK]
251 EXPORT TIM0_IRQHandler [WEAK]
252 EXPORT TIM1_IRQHandler [WEAK]
253 EXPORT TIM2_IRQHandler [WEAK]
254 EXPORT SYSTIME_IRQHandler [WEAK]
255 EXPORT WDG_IRQHandler [WEAK]
256 EXPORT DMAC_IRQHandler [WEAK]
257 EXPORT MCP_IRQHandler [WEAK]
258 EXPORT UART_IRQHandler [WEAK]
259 EXPORT I2C_IRQHandler [WEAK]
260 EXPORT I2CXPIC_IRQHandler [WEAK]
261 EXPORT ECC_IRQHandler [WEAK]
262 EXPORT XPICDEBUG_IRQHandler [WEAK]
263 EXPORT WDGXPIC_IRQHandler [WEAK]
264 EXPORT NFIFO_ARM_APP_IRQHandler [WEAK]
265 EXPORT IOLINK_IRQHandler [WEAK]
266 EXPORT SPI0_IRQHandler [WEAK]
267 EXPORT SPI1_IRQHandler [WEAK]
268 EXPORT SPI2_IRQHandler [WEAK]
269 EXPORT SPIXPIC_IRQHandler [WEAK]
270 EXPORT UARTAPP_IRQHandler [WEAK]
271 EXPORT UARTXPIC_IRQHandler [WEAK]
272 EXPORT ASIC_IRQHandler [WEAK]
273 EXPORT SQI_IRQHandler [WEAK]
274 EXPORT HIFPIO_IRQHandler [WEAK]
275 EXPORT ETH_IRQHandler [WEAK]
276 EXPORT HASH_IRQHandler [WEAK]
277 EXPORT AES_IRQHandler [WEAK]
278 EXPORT MTGY_IRQHandler [WEAK]
279 EXPORT HIFRDY_IRQHandler [WEAK]
280 EXPORT IDPM_IRQHandler [WEAK]
281 EXPORT HSC0_IRQHandler [WEAK]
282 EXPORT HSC1_IRQHandler [WEAK]
283 EXPORT HSC2_IRQHandler [WEAK]
284 EXPORT HSC3_IRQHandler [WEAK]
285 EXPORT HSC4_IRQHandler [WEAK]
286 EXPORT HSC5_IRQHandler [WEAK]
287 EXPORT HSC6_IRQHandler [WEAK]
288 EXPORT HSC7_IRQHandler [WEAK]
289 EXPORT HSC8TO15_IRQHandler [WEAK]
290 EXPORT ENDAT1_IRQHandler [WEAK]
291 EXPORT ENDAT2_IRQHandler [WEAK]
292 EXPORT BISS0_IRQHandler [WEAK]
293 EXPORT BISS1_IRQHandler [WEAK]
294 EXPORT MADC0_IRQHandler [WEAK]
295 EXPORT MADC1_IRQHandler [WEAK]
296 EXPORT MADC2_IRQHandler [WEAK]
297 EXPORT MADC3_IRQHandler [WEAK]
298 EXPORT MPWM_IRQHandler [WEAK]
299 EXPORT MENC0_IRQHandler [WEAK]
300 EXPORT MENC1_IRQHandler [WEAK]
301 EXPORT MENCCAP_IRQHandler [WEAK]
302 EXPORT MENERR_IRQHandler [WEAK]
303 EXPORT GPIO0_IRQHandler [WEAK]
304 EXPORT GPIO1_IRQHandler [WEAK]
305 EXPORT GPIO2_IRQHandler [WEAK]
306 EXPORT GPIO3_IRQHandler [WEAK]
307 EXPORT GPIO4_IRQHandler [WEAK]
308 EXPORT GPIO5_IRQHandler [WEAK]
309 EXPORT GPIO6_IRQHandler [WEAK]
310 EXPORT GPIO7_IRQHandler [WEAK]
311 EXPORT GPIOTIM0_IRQHandler [WEAK]
312 EXPORT GPIOTIM1_IRQHandler [WEAK]
313 EXPORT GPIOTIM2_IRQHandler [WEAK]
314 EXPORT PIO0_IRQHandler [WEAK]
315 EXPORT PIO1_IRQHandler [WEAK]
316 EXPORT PIO2_IRQHandler [WEAK]
317 EXPORT PIO3_IRQHandler [WEAK]
318 EXPORT XCTRIGGER0_IRQHandler [WEAK]
319 EXPORT XCTRIGGER1_IRQHandler [WEAK]
320 EXPORT CAN0_IRQHandler [WEAK]
321 EXPORT CAN1_IRQHandler [WEAK]
322 EXPORT SQI0_IRQHandler [WEAK]
323 EXPORT SQI1_IRQHandler [WEAK]
324 EXPORT CTI0_IRQHandler [WEAK]
325 EXPORT CTI1_IRQHandler [WEAK]
326 EXPORT FPU_IRQHandler [WEAK]
371 XCTRIGGER0_IRQHandler
372 XCTRIGGER1_IRQHandler
401 ; User Initial Stack & Heap
411 IMPORT __use_two_region_memory
412 EXPORT __user_initial_stackheap
414 __user_initial_stackheap PROC
416 LDR R1, =(Stack_Mem + Stack_Size)
417 LDR R2, = (Heap_Mem + Heap_Size)