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Hilscher GmbH
Rheinstraße 15
65795 Hattersheim
Germany

Telephone:
+49 (0)6190 9907-0
Facsimile:
+49 (0)6190 9907-50

E-mail:
info@hilscher.com

netX Details

The central element in the netX is the Data Switch, which links the 32 Bit ARM CPU and the other Bus Masters with the memory and the internal peripherals. It prevents the "Bottleneck" well known from the single busses of other controllers, that it allow the simultaneous access via the various Slave Ports to the data.
The Memory Controller is a component of the Switch and ensures fast access to the external SDRAM.

As peripherals there are all the required functions such as Interrupt controller, Timer, Real-Time-Clock, SPI and I2C-Interfaces available.
Three serial and one USB interfaces, which can be driven as Host or Device are available for further communication. Further function units are the ETM cell for setting Breakpoints and Traces of executed commands as well as a JTAG interface for debugging and for hardware testing.

The Host Controller emulates a Dual Port Memory or is driven for connection of further peripherals or memories as an extension bus.

The special feature of the netX are its four communication channels. These are built up on two levels.

According to the respective network protocol, the Medium-Access-Controller xMAC sends or receives the data netwise and encrypts or converts these into byte depiction.
The Protocol Execution Controller xPEC compiles these into data packets and thus controls the telegram traffic. These are exchanged per DMA in blocks in Round-Robin process - so that no XPEL blocks another - with the internal memory.

The bright idea behind this hardware structure is that all hard Real-Time reactions are carried out by the xMACs and xPECs. For instance, commands that eare incoming via Real-Time Ethernet can be forwarded, without interrupt latency time of the ARM CPU for instance to the output of the PWM synchronize at the motor end step or read in the actual position of the encoders.

Ethernet in automation technology is more than Ethernet. Only special hardware extensions in the Ethernet permit the so-called Real-Time-Ethernet communication.

The netX with its 32 Bit CPU ARM 926 possesses two of these three channels. These already have the analogue part, the so-called PHYs integrated, an optimized Medium-Access Controller xMAC and, in addition, a specially developed Protocol-Execution-Controller xPEC. While the xMAC controls the access to the Ethernet and generates or checks the check sum, the xPEC assesses the Ethernet Header and controls the telegram flow as such. Further function blocks are necessary for the individual Real-Time systems.

POWERLINK uses the HUB functionality for passing the Ethernet telegrams. The access conflicts on the Ethernet are prevented by the protocol process control on the ARM 926. In order to improve performance, the xPEC sends out on a request telegram immediately a response telegram and thus prevents the interrupt latency time of the ARM CPU.

SERCOS-III and EtherCAT hand the Ethernet data immediately from one Port to the other and remove or add their local data at the same time. For this purpose, the xMACs have a direct data connection to each other and possess a filter function in order to identify the local data within an Ethernet Frame. The xPEC is responsible for the transfer in or out of the memory of the ARM.

Ethernet/IP only uses the standard Ethernet functions of a channel. However, for applications in the region of motion control of the synchronization to below a microsecond, the function according the IEEE 1588 international standard is utilized. This measures the sending and receive time of the Ethernet Frame per hardware timer directly at the MII interface between xMAC and PHY. By means of a special protocol, the information is exchanged between the network participants and used for readjusting the local time to a common system time.

The Real-Time communication of PROFINET is based on a switch functionality and the priority control in accordance with IEEE 802.1Q. For this purpose, the xPECs possesses a local memory for managing the routing data and a state machine for controlling telegram transfer.

PROFINET uses the isochrone transmission for motion control. For this purpose the local time is also synchronized via IEEE 1588 network time and the sending of telegrams is carried out on the basis of a configured time table. The time control is a further operating type in the status machine of the xPECs.

Thus, the netX provides the device manufacturer with a unified hardware which activates the respective Real-Time-Ethernet by only needing to change the software.

Of course netX can run all protocols which are based on Standard Ethernet technology like Modbus on TCP/IP.

netX 50

netX 100

netX 500

Core

Processor

ARM 926EJ-S, 200 MIPS, ARMv5TE-command set witht DSP- and Java-extension

x

x

x

Cache

16 KByte commands / 8 KByte Data

x

x

x

Tightly coupled memory

8 KByte Data

x

x

x

Memory Managment Unit

Windows CE- and Linux-Support

x

x

Internal memory

RAM

144 KByte, of this 16 KByte with external voltage supply

x

x

x

Boot ROM

32 KByte

x

x

x

Ethernet-Interface

Ports

2 x 10BASE-T/100BASE-TX, Half-/Full-Duplex, IEEE 1588 time stamp

x

x

x

PHY

Integriert, Auto-Negotiation, Auto-Crossover

x

x

x

Real-Time-Ethernet

EtherCAT with three FMMUs and four Sync-Manager

x

x

x

Ethernet/IP

x

x

x

Powerlink with integrated Hub

x

x

x

PROFINET RT with integrated Switch

x

x

x

SERCOS-III

x

x

x

Feldbus-Interface

Channels

If Ethernet is not used, then two additions fieldbusses are available.
The Systems can be combined as desired. (Quanty)

1

2

Systems

AS-Interface, only Master

x

x

x

CAN

x

x

x

PROFIBUS, Master and Slave

x

x

x

Peripherals

Color LCD Controller

For TFT panels-, color STN- and mono STN-panels
Resolution 320 x 200 to 640 x 480, color depth 1, 2, 4, 8, 16 Bit

x

Real Time clock

with external voltage supply

x

IEEE 1588 System time

32 Bit second counter, 32 Bit Nanosecond counter

x

x

x

USB

Revision 1.1, 12 MBaud Full-Speed, Host- or Device-Mode

x

x

x

UART

16550 kcompatible, max. 3 MBaud, RTS/CTS support (Quantity)

1

3

3

I2C

x

x

x

SPI

Master- and Slave-Mode, max. 10 MHz, 3 Chip Select Signals

x

x

x

AD-Converter

2 x 4 Channels with 1MS/s Sample&Hold and 10 Bit-resolution
Single ended, common analog ground, external reference voltage

x

x

PWM

0–20 kHz/12 Bit-resolution bzw. 0–80 kHz /10 Bit-resolution

x

x

Encoder

2 Channels, implusequardrupling, digital input filter

x

x

General IOs

3.3 V/6 mA (Quantity)

8

16

16

Status LEDs

2 LEDs two-colors, 3.3 V/9 mA

x

x

x

Memory Interface

Memory bus

32 Bit-Databus /24 Bit-Adress bus

x

x

Addresss region

256 MByte SDRAM/64 MByte FLASH

x

x

SMemory modules

SDRAM, SRAM, FLASH

x

x

Host-Interface

Dual-port-Memory-Mode

8/16 Bit-Databus, 64 KByte configurable in 8 Blocs, emulated by internal RAMX

x

x

x

Extension-Mode

8/16 Bit-Databus, 24 Bit Adress bus, Bus timing adjustable

x

x

x

PIO-Mode

Freely programmable inputs and outputs (Quantity)

53

53

53

Debug-Interface

JTAG

ARM-Processor and Boundary-Scan

x

x

x

ETM

Embedded Trace Macrocell, ETM9 V2 Medium Size

x

x

Operating conditions/housings/various data

System cycles

200 MHz ARM / 100 MHz Peripherie

Signal level

3.3 V

Power supply

1.5 V for Core

3.3 V for Input/Output

Operating temperature

Without heat sink

With heat sink (10°/W)

tbd

–40.. + 70 °C

–40.. + 85 °C

–40.. + 70 °C

–40.. + 85 °C

Power input

PHYs switched off

PHYs activated

tbd

1.0 W

1.5 W

1.0 W

1.5 W

Housing

PBGA, 1 mm matrix (Pins)

tbd

345

345

Dimensions (mm)

tbd

22 x 22

22 x 22

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